PIC17C7XX Datasheet, PDF (26/328 Pages) Microchip Technology – High-Performance 8-Bit CMOS EPROM Microcontrollers with 10-bit A/D

PIC17C7XX
TABLE 5-4: INITIALIZATION CONDITIONS FOR SPECIAL FUNCTION REGISTERS (Cont.’d)
Register
Address
Power-on Reset
Brown-out Reset
MCLR Reset
WDT Reset
Wake-up from SLEEP
through interrupt
Bank 1
DDRC ⁽⁵⁾
10h
PORTC ^{(4, 5)}
11h
DDRD ⁽⁵⁾
12h
PORTD ^{(4, 5)}
13h
DDRE ⁽⁵⁾
14h
PORTE ^{(4, 5)}
15h
PIR1
16h
PIE1
17h
1111 1111
xxxx xxxx
1111 1111
xxxx xxxx
---- 1111
---- xxxx
x000 0010
0000 0000
1111 1111
uuuu uuuu
1111 1111
uuuu uuuu
---- 1111
---- uuuu
u000 0010
0000 0000
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
---- uuuu
---- uuuu
uuuu uuuu⁽¹⁾
uuuu uuuu
Bank 2
TMR1
10h
TMR2
11h
TMR3L
12h
TMR3H
13h
PR1
14h
PR2
15h
PR3/CA1L
16h
PR3/CA1H
17h
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
Bank 3
PW1DCL
10h
xx-- ----
uu-- ----
uu-- ----
PW2DCL
11h
xx0- ----
uu0- ----
uuu- ----
PW1DCH
12h
xxxx xxxx
uuuu uuuu
uuuu uuuu
PW2DCH
13h
xxxx xxxx
uuuu uuuu
uuuu uuuu
CA2L
14h
xxxx xxxx
uuuu uuuu
uuuu uuuu
CA2H
15h
xxxx xxxx
uuuu uuuu
uuuu uuuu
TCON1
16h
0000 0000
0000 0000
uuuu uuuu
TCON2
17h
0000 0000
0000 0000
uuuu uuuu
Legend: u = unchanged, x = unknown, - = unimplemented read as '0', q = value depends on condition.
Note 1: One or more bits in INTSTA, PIR1, PIR2 will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GLINTD bit is cleared, the PC is loaded with the interrupt
vector.
3: See Table 5-3 for reset value of specific condition.
4: This is the value that will be in the port output latch.
5: When the device is configured for microprocessor or externded microcontroller mode, the operation of this
port does not rely on these registers
6: On any device reset, these pins are configured as inputs.
DS30289A-page 26
© 1998 Microchip Technology Inc.