PIC17C7XX Datasheet, PDF (187/328 Pages) Microchip Technology – High-Performance 8-Bit CMOS EPROM Microcontrollers with 10-bit A/D

16.7 A/D Accuracy/Error
In systems where the device frequency is low, use of
the A/D RC clock is preferred. At moderate to high fre-
quencies, TAD should be derived from the device oscil-
lator.
The absolute accuracy specified for the A/D converter
includes the sum of all contributions for quantization
error, integral error, differential error, full scale error, off-
set error, and monotonicity. It is defined as the maxi-
mum deviation from an actual transition versus an ideal
transition for any code. The absolute error of the A/D
converter is specified at < ±1 LSb for VDD = VREF (over
the device’s specified operating range). However, the
accuracy of the A/D converter will degrade as VREF
diverges from VDD.
For a given range of analog inputs, the output digital
code will be the same. This is due to the quantization of
the analog input to a digital code. Quantization error is
typically ± 1/2 LSb and is inherent in the analog to dig-
ital conversion process. The only way to reduce quanti-
zation error is to increase the resolution of the A/D
converter or oversample.
Offset error measures the first actual transition of a
code versus the first ideal transition of a code. Offset
error shifts the entire transfer function. Offset error can
be calibrated out of a system or introduced into a sys-
tem through the interaction of the total leakage current
and source impedance at the analog input.
Gain error measures the maximum deviation of the last
actual transition and the last ideal transition adjusted
for offset error. This error appears as a change in slope
of the transfer function. The difference in gain error to
full scale error is that full scale does not take offset error
into account. Gain error can be calibrated out in soft-
ware.
Linearity error refers to the uniformity of the code
changes. Linearity errors cannot be calibrated out of
the system. Integral non-linearity error measures the
actual code transition versus the ideal code transition
adjusted by the gain error for each code.
Differential non-linearity measures the maximum
actual code width versus the ideal code width. This
measure is unadjusted.
The maximum pin leakage current is specified in the
Device Data Sheet electrical specification parameter
#D060.
In systems where the device frequency is low, use of
the A/D RC clock is preferred. At moderate to high fre-
quencies, TAD should be derived from the device oscil-
lator. TAD must not violate the minimum and should be
minimized to reduce inaccuracies due to noise and
sampling capacitor bleed off.
In systems where the device will enter SLEEP mode
after the start of the A/D conversion, the RC clock
source selection is required. In this mode, the digital
noise from the modules in SLEEP are stopped. This
method gives high accuracy.
© 1998 Microchip Technology Inc.
PIC17C7XX
16.8 Connection Considerations
If the input voltage exceeds the rail values (VSS or VDD)
by greater than 0.3V, then the accuracy of the conver-
sion is out of specification.
An external RC filter is sometimes added for anti-alias-
ing of the input signal. The R component should be
selected to ensure that the total source impedance is
kept under the 10 kΩ recommended specification. Any
external components connected (via hi-impedance) to
an analog input pin (capacitor, zener diode, etc.) should
have very little leakage current at the pin.
16.9 Transfer Function
The transfer function of the A/D converter is as follows:
the first transition occurs when the analog input voltage
(VAIN) equals Analog VREF / 1024 (Figure 16-9).
FIGURE 16-9: A/D TRANSFER FUNCTION
3FFh
3FEh
003h
002h
001h
000h
Analog input voltage
16.10 References
A good reference for the undestanding A/D converter is
the "Analog-Digital Conversion Handbook" third edi-
tion, published by Prentice Hall (ISBN 0-13-03-2848-0).
DS30289A-page 187