PIC17C7XX Datasheet, PDF (171/328 Pages) Microchip Technology – High-Performance 8-Bit CMOS EPROM Microcontrollers with 10-bit A/D

PIC17C7XX
15.2.18.2 BUS COLLISION DURING A REPEATED
START CONDITION
During a Repeated Start condition, a bus collision
occurs if:
a) A low level is sampled on SDA when SCL goes
from low level to high level.
b) SCL goes low before SDA is asserted low, indi-
cating that another master is attempting to trans-
mit a data ’1’.
When the user de-asserts SDA and the pin is allowed
to float high, the BRG is loaded with SSPADD<6:0>,
and counts down to 0. The SCL pin is then
de-asserted, and when sampled high, the SDA pin is
sampled. If SDA is low, a bus collision has occurred
(i.e. another master is attempting to transmit a data
’0’). If however SDA is sampled high then the BRG is
reloaded and begins counting. If SDA goes from high
to low before the BRG times out, no bus collision
occurs, because no two masters can assert SDA at
exactly the same time.
If, however, SCL goes from high to low before the BRG
times out and SDA has not already been asserted,
then a bus collision occurs. In this case, another mas-
ter is attempting to transmit a data ’1’ during the
Repeated Start condition.
If at the end of the BRG time out both SCL and SDA
are still high, the SDA pin is driven low, the BRG is
reloaded, and begins counting. At the end of the
count, regardless of the status of the SCL pin, the SCL
pin is driven low and the Repeated Start condition is
complete. (Figure 15-41)
FIGURE 15-41: BUS COLLISION DURING A REPEATED START CONDITION (CASE 1)
SDA
SCL
RSEN
Sample SDA when SCL goes high.
If SDA = 0, set BCLIF and release SDA and SCL
BCLIF
S
'0'
SSPIF ^'0'
Cleared in software
'0'
'0'
FIGURE 15-42: BUS COLLISION DURING REPEATED START CONDITION (CASE 2)
TBRG
TBRG
SDA
SCL
BCLIF
RSEN
SCL goes low before SDA,
Set BCLIF. Release SDA and SCL
Interrupt cleared
in software
S
'0'
'0'
SSPIF
'0'
'0'
© 1998 Microchip Technology Inc.
DS30289A-page 171