PIC17C7XX Datasheet, PDF (25/328 Pages) Microchip Technology – High-Performance 8-Bit CMOS EPROM Microcontrollers with 10-bit A/D

PIC17C7XX
TABLE 5-4: INITIALIZATION CONDITIONS FOR SPECIAL FUNCTION REGISTERS
Register
Address
Power-on Reset
Brown-out Reset
MCLR Reset
WDT Reset
Wake-up from SLEEP
through interrupt
Unbanked
INDF0
00h
FSR0
01h
PCL
02h
PCLATH
03h
ALUSTA
04h
T0STA
05h
CPUSTA⁽³⁾
06h
INTSTA
07h
INDF1
08h
FSR1
09h
WREG
0Ah
TMR0L
0Bh
TMR0H
0Ch
TBLPTRL
0Dh
TBLPTRH
0Eh
BSR
0Fh
N.A.
xxxx xxxx
0000h
0000 0000
1111 xxxx
0000 000-
--11 11qq
0000 0000
N.A.
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
0000 0000
0000 0000
0000 0000
N.A.
uuuu uuuu
0000h
uuuu uuuu
1111 uuuu
0000 000-
--11 qquu
0000 0000
N.A.
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
0000 0000
0000 0000
0000 0000
N.A.
uuuu uuuu
PC + 1⁽²⁾
uuuu uuuu
1111 uuuu
0000 000-
--uu qquu
uuuu uuuu⁽¹⁾
N.A.
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
uuuu uuuu
Bank 0
PORTA ^(4,6)
10h
0-xx 11xx
0-uu 11uu
u-uu uuuu
DDRB
11h
1111 1111
1111 1111
uuuu uuuu
PORTB ⁽⁴⁾
12h
xxxx xxxx
uuuu uuuu
uuuu uuuu
RCSTA1
13h
0000 -00x
0000 -00u
uuuu -uuu
RCREG1
14h
xxxx xxxx
uuuu uuuu
uuuu uuuu
TXSTA1
15h
0000 --1x
0000 --1u
uuuu --uu
TXREG1
16h
xxxx xxxx
uuuu uuuu
uuuu uuuu
SPBRG1
17h
0000 0000
0000 0000
uuuu uuuu
Legend: u = unchanged, x = unknown, - = unimplemented read as '0', q = value depends on condition.
Note 1: One or more bits in INTSTA, PIR1, PIR2 will be affected (to cause wake-up).
2: When the wake-up is due to an interrupt and the GLINTD bit is cleared, the PC is loaded with the interrupt
vector.
3: See Table 5-3 for reset value of specific condition.
4: This is the value that will be in the port output latch.
5: When the device is configured for microprocessor or externded microcontroller mode, the operation of this
port does not rely on these registers
6: On any device reset, these pins are configured as inputs.
© 1998 Microchip Technology Inc.
DS30289A-page 25