MRF24J40_08 Datasheet, PDF (56/152 Pages) Microchip Technology – IEEE 802.15.4™ 2.4 GHz RF Transceiver

MRF24J40
REGISTER 2-51: SECCR2: SECURITY CONTROL 2 REGISTER (ADDRESS: 0x37)
W-0
UPDEC
bit 7
W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
UPENC TXG2CIPHER2 TXG2CIPHER1 TXG2CIPHER0 TXG1CIPHER2 TXG1CIPHER1 TXG1CIPHER0
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6
bit 5-3
bit 2-0
UPDEC: Upper Layer Security Decryption Mode bit
1 = Perform upper layer decryption using TX Normal FIFO. Automatically cleared to ‘0’ when finished.
UPENC: Upper Layer Security Encryption Mode bit
1 = Perform upper layer encryption using TX Normal FIFO. Automatically cleared to ‘0’ when finished.
TXG2CIPHER-<2:0>: TX GTS2 FIFO Security Suite Select bits
111 = AES-CBC-MAC-32
110 = AES-CBC-MAC-64
101 = AES-CBC-MAC-128
100 = AES-CCM-32
011 = AES-CCM-64
010 = AES-CCM-128
001 = AES-CTR
000 = None (default)
TXG1CIPHER-<2:0>: TX GTS1 FIFO Security Suite Select bits
111 = AES-CBC-MAC-32
110 = AES-CBC-MAC-64
101 = AES-CBC-MAC-128
100 = AES-CCM-32
011 = AES-CCM-64
010 = AES-CCM-128
001 = AES-CTR
000 = None (default)
DS39776B-page 54
Preliminary
© 2008 Microchip Technology Inc.