MRF24J40_08 Datasheet, PDF (48/152 Pages) Microchip Technology – IEEE 802.15.4™ 2.4 GHz RF Transceiver

MRF24J40
REGISTER 2-42: SECCON1: SECURITY CONTROL 1 REGISTER (ADDRESS: 0x2D)
R/W-0
r
bit 7
R/W-0
TXBCIPHER2
R/W-0
TXBCIPHER1
R/W-0
TXBCIPHER0
R/W-0
r
R/W-0
r
R/W-0
DISDEC
R/W-0
DISENC
bit 0
Legend:
R = Readable bit
-n = Value at POR
r = reserved
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6-4
bit 3-2
bit 1
bit 0
Reserved: Read as ‘0’
TXBCIPHER<2:0>: TX Beacon FIFO Security Suite Select bits
111 = AES-CBC-MAC-32
110 = AES-CBC-MAC-64
101 = AES-CBC-MAC-128
100 = AES-CCM-32
011 = AES-CCM-64
010 = AES-CCM-128
001 = AES-CTR
000 = None (default)
Reserved: Read as ‘0’
DISDEC: Disable Decryption Function bit
1 = Will not generate a security interrupt if security enabled bit is set in the MAC header
DISENC: Disable Encryption Function bit
1 = Will not encrypt packet if transmit security is enabled
DS39776B-page 46
Preliminary
© 2008 Microchip Technology Inc.