MRF24J40_08 Datasheet, PDF (16/152 Pages) Microchip Technology – IEEE 802.15.4™ 2.4 GHz RF Transceiver

MRF24J40
2.15 Control Register Description
Control registers provide control, status and device
addressing for MRF24J40 operations. The following
figures, tables and register definitions describe the
control register operation.
2.15.1 CONTROL REGISTER MAP
FIGURE 2-11:
SHORT ADDRESS CONTROL REGISTER MAP FOR MRF24J40
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
0x0F
RXMCR
PANIDL
PANIDH
SADRL
SADRH
EADR0
EADR1
EADR2
EADR3
EADR4
EADR5
EADR6
EADR7
RXFLUSH
Reserved
Reserved
0x10 ORDER
0x11 TXMCR
0x12 ACKTMOUT
0x13 ESLOTG1
0x14 ^SYMTICKL
0x15 ^SYMTICKH
0x16 ^PACON0
0x17 ^PACON1
0x18 ^PACON2
0x19
0x1A
Reserved
TXBCON0
0x1B ^TXNCON
0x1C ^TXG1CON
0x1D ^TXG2CON
0x1E
0x1F
ESLOTG23
ESLOTG45
0x20 ESLOTG67
0x21 TXPEND
0x22 WAKECON
0x23 FRMOFFSET
0x24 TXSTAT
0x25 TXBCON1
0x26 GATECLK
0x27 TXTIME
0x28 HSYMTMRL
0x29 HSYMTMRH
0x2A SOFTRST
0x2B Reserved
0x2C SECCON0
0x2D SECCON1
0x2E TXSTBL
0x2F ^Reserved
0x30
0x31
0x32
0x33
0x34
0x35
0x36
0x37
0x38
0x39
0x3A
0x3B
0x3C
0x3D
0x3E
0x3F
RXSR
INTSTAT
INTCON
GPIO
TRISGPIO
SLPACK
RFCTL
SECCR2
BBREG0
BBREG1
BBREG2
BBREG3
BBREG4
Reserved
BBREG6
CCAEDTH
FIGURE 2-12:
LONG ADDRESS CONTROL REGISTER MAP FOR MRF24J40
0x200
0x201
0x202
0x203
0x204
0x205
0x206
0x207
0x208
0x209
0x20A
0x20B
0x20C
0x20D
0x20E
0x20F
RFCON0
RFCON1
RFCON2
RFCON3
Reserved
RFCON5
RFCON6
RFCON7
RFCON8
SLPCAL0
SLPCAL1
SLPCAL2
Reserved
Reserved
Reserved
RFSTATE
0x210
0x211
0x212
0x213
0x214
0x215
0x216
0x217
0x218
0x219
0x21A
0x21B
0x21C
0x21D
0x21E
0x21F
RSSI
SLPCON0
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
0x220
0x221
0x222
0x223
0x224
0x225
0x226
0x227
0x228
0x229
0x22A
0x22B
0x22C
0x22D
0x22E
0x22F
SLPCON1
Reserved
WAKETIMEL
WAKETIMEH
REMCNTL
REMCNTH
MAINCNT0
MAINCNT1
MAINCNT2
MAINCNT3
Reserved
Reserved
Reserved
Reserved
Reserved
TESTMODE
ox230 ASSOEADR0
0x231 ASSOEADR1
0x232 ASSOEADR2
0x233 ASSOEADR3
0x234 ^ASSOEADR4
0x235 ASSOEADR5
0x236 ASSOEADR6
0x237 ASSOEADR7
0x238 ASSOSADR0
0x239
0x23A
ASSOSADR1
Reserved
0x23B
Reserved
0x23C Unimplemented
0x23D Unimplemented
0x23E Unimplemented
0x23F Unimplemented
0x240
0x241
0x242
0x243
0x244
0x245
0x246
0x247
0x248
0x249
0x24A
0x24B
0x24C
UPNONCE0
UPNONCE1
UPNONCE2
UPNONCE3
UPNONCE4
UPNONCE5
UPNONCE6
UPNONCE7
UPNONCE8
UPNONCE9
UPNONCE10
UPNONCE11
UPNONCE12
DS39776B-page 14
Preliminary
© 2008 Microchip Technology Inc.