MRF24J40_08 Datasheet, PDF (106/152 Pages) Microchip Technology – IEEE 802.15.4™ 2.4 GHz RF Transceiver

MRF24J40
3.11.1 RECEPTION MODES
The MRF24J40 can be configured for one of three
different Reception modes as shown in Table 3-13. An
explanation of each of the modes follows.
TABLE 3-13: RECEPTION MODES
Receive Mode
RXMCR (0x00<1:0>)
Normal
Error
Promiscuous
00 (default)
10
01
3.11.1.1 Normal Mode
Normal mode accepts only packets with a good CRC
and satisfies the requirements of the IEEE 802.15.4
Specification, Section 7.5.6.2 “Reception and
Rejection”:
1. The frame type subfield of the frame control field
shall not contain an illegal frame type.
2. If the frame type indicates that the frame is a
beacon frame, the source PAN identifier shall
match macPANId unless macPANID is equal to
0xFFFF, in which case, the beacon frame will be
accepted regardless of the source PAN
identifier.
3. If a destination PAN identifier is included in the
frame, it shall match macPANId or shall be the
broadcast PAN identifier (0xFFFF).
4. If a short destination address is included in the
frame, it shall match either macShortAddress
or the broadcast address (0xFFFF). Otherwise,
if an extended destination address is included in
the frame, it shall match aExtendedAddress.
5. If only source addressing fields are included in a
data or MAC command frame, the frame shall
be accepted only if the device is a PAN
coordinator and the source PAN identifier
matches macPANId.
3.11.1.2 Error Mode
Error mode accepts packets with good or bad CRC.
3.11.1.3 Promiscuous Mode
Promiscuous mode accepts all packets with a good
CRC.
3.11.2 FRAME FORMAT FILTER
Once the packet has been accepted, depending on the
Reception mode above, the frame format is filtered
according to Table 3-14. Command, data or beacon
only frames can be filtered and placed in the RXFIFO
buffer. All frames (default) can be selected placing all
frame formats (command, data and beacon) in the
RXFIFO.
TABLE 3-14: FRAME FORMAT FILTER
Filter Mode
RXFLUSH (0x0D<3:1>)
All Frames
Command Only
Data Only
Beacon Only
000 (default)
100
010
001
3.11.3 ACKNOWLEDGMENT REQUEST
If the received packet has the Acknowledgment
request bit set to ‘1’ (bit 5 of the Frame Control Field –
refer to IEEE 802.15.4 Standard, Section 7.2.1.1
“Frame Control Field”), the TXMAC circuitry will send
an Acknowledgment packet automatically. This feature
minimizes the processing duties of the host micro-
controller and keeps the Acknowledgment timing within
the IEEE 802.15.4 Specification.
The sequence number field of the Acknowledgment
frame will contain the value of the sequence number of
the received frame for which the Acknowledgment is to
be sent.
Refer to Section 3.13 “Acknowledgement” for more
information.
3.11.4 RECEIVE INTERRUPT
Once the packet is accepted, depending on the Recep-
tion mode (Normal, Error or Promiscuous) and frame
format (all, command, data or beacon), it is placed in
the RXFIFO buffer and a Receive Interrupt (RXIF
0x31<3>) is issued.
Note:
The INTSTAT (0x31) register
clears-to-zero upon read. Therefore, the
host microcontroller should read and store
the INTSTAT register and check the bits to
determine which interrupt occurred. Refer
to Section 3.3 “Interrupts” for more
information.
Data is placed into the RXFIFO buffer as shown in
Figure 3-9. The host processor reads the RXFIFO via
the SPI port by reading addresses, 0x300-0x38F.
Address, 0x300, contains the received packet frame
length which includes the header length, data payload
length, plus 2 for the FCS bytes. An LQI and RSSI value
comes after the FCS. Refer to Section 3.6 “Received
Signal Strength Indicator (RSSI)/Energy Detection
(ED)” and Section 3.7 “Link Quality Indication (LQI)”
for more information.
DS39776B-page 104
Preliminary
© 2008 Microchip Technology Inc.