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| MRF24J40_08 Datasheet, PDF (40/152 Pages) Microchip Technology – IEEE 802.15.4™ 2.4 GHz RF Transceiver | |||
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MRF24J40
REGISTER 2-33: FRMOFFSET: SUPERFRAME COUNTER OFFSET TO ALIGN BEACON
REGISTER (ADDRESS: 0x23)
R/W-0
OFFSET7(1)
bit 7
R/W-0
R/W-0
R/W-0
R/W-0
OFFSET6(1) OFFSET5(1) OFFSET4(1) OFFSET3(1)
R/W-0
OFFSET2(1)
R/W-0
R/W-0
OFFSET1(1) OFFSET0(1)
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
â1â = Bit is set
U = Unimplemented bit, read as â0â
â0â = Bit is cleared
x = Bit is unknown
bit 7-0
OFFSET<7:0>: Superframe Counter Offset for Align Air Slot Boundary bits(1)
For Beacon-Enabled mode device. Default value: 0x00. Recommended value: 0x15.
Note 1: Refer to Section 3.8.1.6 âConfiguring Beacon-Enabled Deviceâ for more information.
DS39776B-page 38
Preliminary
© 2008 Microchip Technology Inc.
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