MRF24J40_08 Datasheet, PDF (123/152 Pages) Microchip Technology – IEEE 802.15.4™ 2.4 GHz RF Transceiver

MRF24J40
3.15.2 IMMEDIATE SLEEP AND WAKE-UP
MODE
In the Immediate Sleep and Wake-up mode, the host
microcontroller places the MRF24J40 to Sleep and
wakes it up.
To enable the Immediate Wake-up mode, set the
IMMWAKE (0x22<7>) bit to ‘1’.
To place the MRF24J40 to Sleep immediately, perform
the following two steps:
1. Perform a Power Management Reset by setting
the RSTPWR (0x2A<2>) bit to ‘1’. The bit will be
automatically cleared to ‘0’ by hardware.
2. Put the MRF24J40 to Sleep immediately by set-
ting the SLPACK (0x35<7>) bit to ‘1’. The bit will
be automatically cleared to ‘0’ by hardware.
Wake-up can be performed in one of two methods:
1. Wake-up on WAKE pin 15. To enable the WAKE
pin, set the WAKEPAD (0x0D<5>) bit to ‘1’ and
set the WAKE pin polarity. Set the WAKEPOL
(0x0D<7>) bit to ‘1’ for active-high signal, or
clear to ‘0’ for active-low signal.
or
2. Wake-up on register. To wake up the MRF24J40
from Sleep via the SPI port, set the REGWAKE
(0x22<6>) bit to ‘1’ and then clear to ‘0’.
After wake-up, delay at least 2 ms to allow 20 MHz main
oscillator time to stabilize before transmitting or receiving.
Example 3-3 summarizes the steps to prepare the
MRF24J40 for wake-up on WAKE pin and placing to
Sleep.
EXAMPLE 3-3: IMMEDIATE SLEEP AND WAKE
The steps to prepare the MRF24J40 for immediate sleep and wake up on WAKE pin
Prepare WAKE pin:
1. WAKE pin = low
2. RXCON (0x0D) = 0x60 – Enable WAKE pin and set polarity to active-high
3. WAKECON (0x22) = 0x80 – Enable Immediate Wake-up mode
Put to Sleep:
4. SOFTRST (0x2A) = 0x04 – Perform a Power Management Reset
5. SLPACK (0x35) = 0x80 – Put MRF24J40 to Sleep immediately
To Wake:
6. WAKE pin = high – Wake-up MRF24J40
7. Delay 2 ms to allow 20 MHz main oscillator time to stabilize before transmitting or receiving.
TABLE 3-21: REGISTERS ASSOCIATED WITH SLEEP
Addr. Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0x31 INSTAT
SLPIF
WAKEIF HSYMTMRIF SECIF
RXIF
TXG2IF
TXG1IF
TXNIF
0x32 INTCON
SLPIE
WAKEIE HSYMTMRIE SECIE
RXIE
TXG2IE
TXG1IE
TXNIE
0x35 SLPACK
SLPACK WAKECNT6 WAKECNT5 WAKECNT4 WAKECNT3 WAKECNT2 WAKECNT1 WAKECNT0
0x36 RFCTL
r
r
r
WAKECNT8 WAKECNT7 RFRST
r
0x207 RFCON7 SLPCLKSEL1 SLPCLKSEL0
r
r
r
r
r
r
0x20B SLPCAL2 SLPCALRDY
r
r
SLPCALEN SLPCAL19 SLPCAL18 SLPCAL17 SLPCAL16
0x211 SLPCON0
r
r
r
r
r
r
INTEDGE SLPCLKEN
0x220 SLPCON1
r
r
CLKOUTEN SLPCLKDIV4 SLPCLKDIV3 SLPCLKDIV2 SLPCLKDIV1 SLPCLKDIV0
0x223 WAKETIMEH
r
r
r
r
r
WAKETIME10 WAKETIME9 WAKETIME8
0x224 REMCNTL REMCNT7 REMCNT6 REMCNT5 REMCNT4 REMCNT3 REMCNT2 REMCNT1 REMCNT0
0x225 REMCNTH REMCNT15 REMCNT14 REMCNT13 REMCNT12 REMCNT11 REMCNT10 REMCNT9 REMCNT8
0x226 MAINCNT0 MAINCNT7 MAINCNT6 MAINCNT5 MAINCNT4 MAINCNT3 MAINCNT2 MAINCNT1 MAINCNT0
0x227 MAINCNT1 MAINCNT15 MAINCNT14 MAINCNT13 MAINCNT12 MAINCNT11 MAINCNT10 MAINCNT9 MAINCNT8
0x228 MAINCNT2 MAINCNT23 MAINCNT22 MAINCNT21 MAINCNT20 MAINCNT19 MAINCNT18 MAINCNT17 MAINCNT16
0x229 MAINCNT3 STARTCNT
r
r
r
r
r
MAINCNT25 MAINCNT24
© 2008 Microchip Technology Inc.
Preliminary
DS39776B-page 121