1EDI2002AS_15 Datasheet, PDF (99/147 Pages) Infineon Technologies AG – Single Channel Isolated Driver for Inverter Systems AD Step

EiceDRIVER™ SIL
1EDI2002AS
Register Description
Primary Pin Status Register
This register provides status information on the I/Os of the primary chip.
PPIN
Primary Pin Status Register
Offset
0A_H
Wakeup Value
n.a.
Reset Value
xxxx_H
15
7
DOUTL
rh
6
NFLTBL
rh
5
NFLTAL
rh
0
r
4
ENL
rh
3
INSTPL
rh
2
INPL
rh
9
8
DIO1L
rh
1
0
LMI
P
rh
rh
Field
0
DIO1L
DOUTL
NFLTBL
NFLTAL
ENL
INSTPL
Bits
Type Description
15:9
r
Reserved
Read as 0_B.
8
rh
Pin DIO1 Level
This bit indicates the logical level read on pin DIO1.
0_B: Low-level is detected.
1_B: High-level is detected.
7
rh
Pin DOUT Level
This bit indicates the logical level read on pin DOUT.
0_B: Low-level is detected.
1_B: High-level is detected.
6
rh
Pin NFLTB Level
This bit indicates the logical level read on pin NFLTB.
0_B: Low-level is detected.
1_B: High-level is detected.
5
rh
Pin NFLTA Level
This bit indicates the logical level read on pin NFLTA.
0_B: Low-level is detected.
1_B: High-level is detected.
4
rh
Pin EN/FEN Level
This bit indicates the logical level read on pin EN/FEN.
0_B: Low-level is detected.
1_B: High-level is detected.
3
rh
Pin INSTP Level
This bit indicates the logical level read on pin INSTP.
0_B: Low-level is detected.
1_B: High-level is detected.
Datasheet
99
Hardware Description
Rev. 3.1, 2015-07-30