1EDI2002AS_15 Datasheet, PDF (67/147 Pages) Infineon Technologies AG – Single Channel Isolated Driver for Inverter Systems AD Step

EiceDRIVER™ SIL
1EDI2002AS
Protection and Diagnostics
The V_CC1 voltage is compared (using an internal voltage comparator) to an internal reference threshold. If the
power supply voltage V_CC1 of the primary chip drops below V_UVLO1L, an error is detected. In this case, an
emergency (Regular) turn-off sequence is initiated and signal NRST/RDY goes low. In case V_CC1 reaches
afterwards a level higher than V_UVLO1H, then the error condition is removed and signal NRST/RDY is deasserted.
Besides, bit PER.RST1 is set.
The V_CC2 voltage is compared (using an internal voltage comparator) to an internal reference threshold. If the
power supply voltage V_CC2 of the secondary chip drops below V_UVLO2L, an error is detected. In this case, an
emergency (Regular) turn-off sequence is initiated, bit SER.UVLO2ER is set and signal NFLTB is activated (in
case of an OPM transition the state machine - see Chapter 2.4.7). In case V_CC2 reaches afterwards a level higher
than V_UVLO2H, then the error condition is removed and the device can be reenabled.
The V_CC2 voltage is compared (using an internal voltage comparator) to an internal reference threshold. If the
power supply voltage V_CC2 of the secondary chip goes above V_OVLO2H, an error is detected. In this case, an
emergency (Regular) turn-off sequence is initiated, bit SER.OVLO2ER is set and signal NFLTB is activated (in
case of an OPM transition the state machine - see Chapter 2.4.7). In case V_CC2 reaches afterwards a level below
V_OVLO2L, then the error condition is removed and the device can be reenabled.
The V_EE2 voltage is compared (using an internal voltage comparator) to an internal reference threshold. If the
power supply voltage V_EE2 of the secondary chip drops below V_UVLO3L an error is detected. In this case, an
emergency (Regular) turn-off sequence is initiated, bit SER.UVLO3ER is set and signal NFLTB is activated (in
case of an OPM transition the state machine - see Chapter 2.4.7). In case V_EE2 reaches afterwards a level higher
than V_UVLO3H, then the error condition is removed and the device can be reenabled.
The V_EE2 voltage is compared (using an internal voltage comparator) to an internal reference threshold. If the
power supply voltage V_EE2 of the secondary chip goes above V_OVLO3H, an error is detected. In this case, if bit
SCFG2.OVLO3D is set, an emergency (Regular) turn-off sequence is initiated, bit SER.OVLO3ER is set and
signal NFLTB is activated (in case of an OPM transition the state machine - see Chapter 2.4.7). In case V_EE2
reaches afterwards a level below V_OVLO3L, then the error condition is removed and the device can be reenabled.
In case an error is detected while bit SCFG2.OVLO3D is cleared, no emergency turn-off sequence is initiated, and
NFLTB is not activated. However, bit is SER.OVLO3ER set.
The current status of the error detection of OVLO2, UVLO3 and OVLO3 mechanism is available by reading bit
SSTAT2.UVLO2M, OVLO2M,UVLO3M or OVLO3M respectively.
Note: In case V_CC2 goes below the voltage V_RST2, the secondary chip is kept in reset state.
3.3.2 Internal Supervision
The Internal Supervision functionality is summarized in Table 3-7:
Table 3-7 System Supervision Overview
Parameter
Short Description
Function
Monitoring of the key internal functions of the chip.
Periodicity
Continuous.
Action in case of failure event See below
Programmability
No.
In-System Testability
No.
The primary and secondary chips are equipped with internal verification mechanisms ensuring that the key
functions of the device are operating correctly. The internal blocks which are supervised are listed below:
• Lifesign watchdog: mutual verification of the response of both chips (both primary and secondary).
• Oscillators (both primary and secondary, including open / short detection on signals IREF1 and IREF2).
Datasheet
67
Hardware Description
Rev. 3.1, 2015-07-30