1EDI2002AS_15 Datasheet, PDF (57/147 Pages) Infineon Technologies AG – Single Channel Isolated Driver for Inverter Systems AD Step

EiceDRIVER™ SIL
1EDI2002AS
Functional Description
2.4.11 Low Latency Digital Channel
The low latency digital channel aims at providing an alternative to discrete galvanic isolators. Digital signals can
be transmitted through pins DIO1 and DIO2. The direction of the channel is given by bit field PCFG2.DIO1 and
SCFG2.DIO2. The functionality of the channel is shown Figure 2-18.
DIO1 Output, DIO2 Input
DIO2
tDSPON
DIO1
tDSPOFF
DIO1 Input, DIO2 Output
DIO1
tDPSON
DIO2
tDPSOFF
time
time
Figure 2-18 Low Latency Digital Channel
The voltage level at pin DIO1 can be read at bit PPIN.DIO1L. The voltage level at pin DIO2 can be read at bit
SSTAT2.DIO2L.
The input stages of signals DIO1 and DIO2 include each a Debouncing Filter. The input signals are that way
filtered from glitches and noise (mini-filter of two consecutive OSC2 cycles).
Datasheet
57
Hardware Description
Rev. 3.1, 2015-07-30