1EDI2002AS_15 Datasheet, PDF (45/147 Pages) Infineon Technologies AG – Single Channel Isolated Driver for Inverter Systems AD Step

EiceDRIVER™ SIL
1EDI2002AS
Functional Description
2.4.6.2 Switching Sequence Description
Figure 2-16 shows an idealized switching sequence. When a valid turn-on command is detected, a certain
propagation time t_PDON is needed by the logic to transfer the PWM command to the secondary side. At this point
the TTOFF delay time t_TTOFF defined by bit field SRTTOF.RTVAL is added before the turn-on command is
executed. Signal TON is then activated, while signal TOFF is deactivated.
In case the two level turn-on function is active, signal TON is increased up to the plateau voltage defined by bit
field SCTRL.GPONS. The duration t_TTON between the beginning of the turn-on sequence and the moment where
the switching sequence is resumed is defined by bit field SCFG2.TTOND.
When a valid turn-off command is detected, a certain propagation time t_DOFF is needed by the command to be
processed by the logic on the secondary side. This propagation time depends on the event having generated the
turn-off action (non exhaustive list):
• In case of a PWM turn-off command at pin INP, t_DOFF=t_PDOFF.
• In case of a DESAT Event, t_DOFF=t_OFFDESAT2.
• In case of an OCP event, t_DOFF=t_OFFOCP2.
• In case of an Event Class A on the primary side: t_DOFF=t_OFFCLA.
• In case of an Event Class B on the secondary side: t_DOFF=t_OFFCLB2.
When the turn-off command is processed by the logic, signal DACLP is deactivated (i.e. active clamping is
enabled). Signal TON and TOFF are decreased with the slew rate t_SLEW fixed by hardware. Once the voltage at
pin TOFF has reached the value defined by bit field SCTRL.GPOFS (or SSTTOF.GPS in the case of a safe turn-
off), the turn-off sequence is interrupted. Time t_TTOFF is defined as the moment when the device starts turning off
signal TOFF, and the moment where the turn-off sequence is resumed. Depending on the event that triggered the
turn-off sequence, t_TTOFF is given by either bit field SRTTOF.RTVAL or SSTTOF.STVAL. Once the TTOFF time
has elapsed, a hard commutation takes place, and signals TON and TOFF are driven to V_EE2.
Note: Once a turn-off sequence is started, it is completed to the end with the same delay parameters.
At the moment when the hard commutation takes place, signal DACLP remains deactivated for time t_ACL defined
by bit field SACLT.AT. When this time is elapsed, signal DACLP is reactivated (i.e. active clamping is disabled).
When bit SCFG2.ACLPM is set, signal DACLP is only deactivated in case of a safe turn-off sequence, for a total
duration t_ACL (+ t_TTOFF, if applicable).
In case SACLT.AT is set to 0_H, DACLP is constantly activated (constant High level). In case SACLT.AT is set to
FF_H, DACLP is constantly at Low level.
The Gate Monitoring function (time-out mechanism) is started at each turn-on and turn-off sequence. See
Chapter 3.4.2 for more details.
Datasheet
45
Hardware Description
Rev. 3.1, 2015-07-30