1EDI2002AS_15 Datasheet, PDF (111/147 Pages) Infineon Technologies AG – Single Channel Isolated Driver for Inverter Systems AD Step

Field
CFG2
VBEC
0
LMI
P
EiceDRIVER™ SIL
1EDI2002AS
Register Description
Bits
Type Description
5
rwh
Advanced Secondary Configuration Enable Bit
This bit field enables write accesses to register SCFG2.
0_B: Write access to SCFG2 are discarded.
1_B: Write access to SCFG2 are executed normally.
This bit is cleared when leaving Mode OPM2.
4
rw
V_BE Compensation
This bit enables the V_BE compensation of the TTOFF,
TTON and WTO plateau levels.
0_B: V_BE Compensation disabled.
1_B: V_BE Compensation enabled.
3:2
r
Reserved
Read as 0_B.
1
rh
Last Message Invalid Notification
This bit indicates if the last received SPI Message was
correctly processed by the device.
0_B: Previous Message was processed correctly.
1_B: Previous Message was discarded.
0
rh
Parity Bit
Odd Parity Bit.
Datasheet
111
Hardware Description
Rev. 3.1, 2015-07-30