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1EDI2002AS_15 Datasheet, PDF (16/147 Pages) Infineon Technologies AG – Single Channel Isolated Driver for Inverter Systems AD Step
2.2.2 Pin Functionality
EiceDRIVER™ SIL
1EDI2002AS
Functional Description
2.2.2.1 Primary Side
GND1
Ground connection for the primary side.
VCC1
5V power supply for the primary side (referring to GND1).
INP
Non-inverting PWM input of the driver. The internal structure of the pad makes the IC robust against glitches. An
internal weak pull-down resistor to VREF0 drives this input to Low state in case the pin is floating.
INSTP
Monitoring PWM input for shoot through protection. The internal structure of the pad makes the IC robust against
glitches. An internal weak pull-down resistor to VREF0 drives this input to Low state in case the pin is floating.
REF0
Reference Ground signal for the signals INP, INSTP, EN/FEN. This pin should be connected to the ground signal
of the logic issuing those signals.
EN/FEN
Enable Input Signal. This signal allows the logic on the primary side to turn-off and deactivate the device. An
internal weak pull-down resistor to VREF0 drives this input to Low state in case the pin is floating. This pin reacts
on logic levelsor on a periodic signal, depending on the device’s configuration.
NFLTA
Open-Drain Output signal used to report major failure events (Event Class A). In case of an error event, NFLTA
is driven to Low state. This pin shall be connected externally to VCC1 with a pull-up resistance.
NFLTB
Open-Drain Output signal used to report major failure events (Event Class B). In case of an error event, NFLTB
is driven to Low state. This pin shall be connected externally to VCC1 with a pull-up resistance.
SCLK
Serial Clock Input for the SPI interface. An internal weak pull-up device to VCC1 drives this input to high state in
case the pin is floating.
SDO
Serial Data Output (push-pull) or the SPI interface.
SDI
Serial Data Input for the SPI interface. An internal weak pull-up device to VCC1 drives this input to high state in case
the pin is floating.
Datasheet
16
Hardware Description
Rev. 3.1, 2015-07-30