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HYE18P32160AC Datasheet, PDF (33/53 Pages) Infineon Technologies AG – 32M Synchronous Burst CellularRAM
HYE18P32160AC(-/L)9.6/12.5/15
32M Synchronous Burst CellularRAM
Functional Description
Table 13 Timing Parameters - Asynchronous Read
Parameter
Symbol
9.6, 12.5
Min.
Max.
Read cycle time
Address access time
ADV access time
ADV high time
Page address cycle time
Page address access time
Output hold from address change
Chip select access time
UB, LB access time
OE to valid output data
Chip select pulse width low time
Chip select to output active
Chip select disable to high-Z output
UB, LB enable to output active
UB, LB disable to high-Z output
Output enable to output active
Output disable to high-Z output
CS high time when toggling
UB, LB high time when toggling
tRC
tAA
tAADV
tVPH
tPC
tPAA
tOH
tCO
tBA
tOE
tCSL
tLZ
tHZ
tBLZ
tBHZ
tOLZ
tOHZ
tCPH
tBPH
70
–
–
70
–
70
5
–
20
–
–
20
5
–
–
70
–
70
–
20
–
10
6
–
–
8
6
–
–
8
3
–
–
6
10
–
10
–
15
Min.
Max.
85
–
–
85
–
85
7
–
25
–
–
25
6
–
–
85
–
85
–
25
–
10
6
–
–
8
6
–
–
8
3
–
–
8
15
–
15
–
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
Notes
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Data Sheet
33
V2.0, 2003-12-16