HYE18P32160AC Datasheet, PDF (15/53 Pages) Infineon Technologies AG – 32M Synchronous Burst CellularRAM

HYE18P32160AC(-/L)9.6/12.5/15
32M Synchronous Burst CellularRAM
Overview
3) Output driver controlled by the asynchronous OE signal
4) Stand-by power mode applies only to the case when CS goes low from DESELECT while no address change occurs. NO
OPERATION from any active power mode by keeping CS low consumes the power higher than stand-by mode.
5) The asynchronous OE control signal has to be asserted to ‘H’.
6) Deep power down is maintained until control register is re-programmed to disable the bit for deep power down (RCR Bit 4).
Note: ‘L’ represents a low voltage level, ‘H’ a high voltage level, ‘X’ represents “Don’t Care”, ‘V’ represents “Valid”.
Table 7 Description of Commands in NOR-Flash Type Mode
Mode
Description
WRITE
The WRITE command is used to perform an asynchronous write cycle. While the
address is latched by the rising edge of ADV, the data is latched by the rising
edge of either CS, WE, UB, LB, whichever comes first. The signals, UB and LB,
define whether only the lower, the upper or the whole 16-bit word is latched into
the CellularRAM.
BURST INIT
The BURST INIT command is used to initiate a synchronous burst read access
and to latch the burst start address. The burst length is determined by the bit2 -
bit0 in the Bus Configuration Register.
BURST READ
The BURST READ command is used to perform a synchronous burst read
access. The first data is output after the number of clock cycles as defined by the
programmed latency mode.
SET CONTROL REGISTER
The control registers are loaded via the address inputs A19, A15 - A0 performing
an asynchronous NOR-Flash type write access. Please refer to the control
register description for details. The SCR command can only be issued when the
CellularRAM is in idle state and no bursts are in progress.
NO OPERATION
The NOP command is used to perform a no operation to the CellularRAM, which
is selected (CS = 0). Operations already in progress are not affected.
DESELECT
The DESELECT function prevents new commands from being executed by the
CellularRAM. The CellularRAM is effectively deselected. I/O signals are put to
high impedance state.
DPD
DPD stops all refresh-related activities and entire on-chip circuit operation.
Current consumption drops below 25 µA. Wake-up from DPD also requires
150 µs to get ready for normal operation.
Data Sheet
15
V2.0, 2003-12-16