ICS1531 Datasheet, PDF (58/76 Pages) Integrated Circuit Systems – Triple 8-bit MSPS A/D Converters with Line-Locked Clock Generator

ICS1531 Data Sheet - Preliminary
Chapter 8 Layout and Power Considerations
Chapter 8 Layout and Power Considerations
8.1 Layout Considerations
8.1.1 General Guidelines for Printed Circuit Board Layout
To lay out a printed circuit board that uses the ICS1531, see Figure 8-1 and use the following general
guidelines.
• Use a printed circuit board with at least the following four planes:
– One power plane
– One ground plane. (No special cutouts required.)
– Two signal planes
• Power supply voltages:
– Provide all supply voltages from a common source.
– Ensure that all supply voltages ramp together.
– Bypass each power supply pin with a 0.1-µF capacitor.
• When using capacitors for filtering or decoupling, use either tantalum or ceramic capacitors with good
high-frequency characteristics. (Do not use electrolytic capacitors.) Place the capacitors as close as
possible to the ICS1531 pins that are being filtered or decoupled.
• Trace widths:
– Use nominal trace widths of approximately 0.020 to 0.025 cm.
– Use a maximum trace width of approximately 0.076 cm.
• As Figure 8-1 indicates, connect the appropriate VDDx and VSSx pins to the appropriate plane, using
multiple surface-etched vias.
• Ensure that the area of the printed circuit board where the ICS1531 is placed is free of contaminants.
(Flux and other board-surface debris can degrade the performance of the external loop filter.)
Figure 8-1. General Decoupling Circuit for ICS1531
ICS1531
VDDx
2.54 cm max
1.27 cm max
0.1 µF
Ferrite bead _{Multiple vias}
FB
0.1 µF
VCC
+
10 µF
VSSx
Width from ~
0.025 to
0.076 cm
Multiple vias
ICS1531 Rev N 12/1/99
Copyright © 1999, Integrated Circuit Systems, Inc.
All rights reserved.
58
December, 1999