ICS1531 Datasheet, PDF (25/76 Pages) Integrated Circuit Systems – Triple 8-bit MSPS A/D Converters with Line-Locked Clock Generator

ICS1531 Data Sheet - Preliminary
Chapter 6 Register Set
Table 6-2. Register Set Outline (Continued)
Register Register Name Register
Index
Access
10h
Chip Ver
Read
Bit # Bit Name
7-0 Chip Ver
Brief Description
Read chip version 31 decimal (1F hex) as in 1531
Reset
Value
1F
11h
Chip Rev
Read. IN-A. 7-4 Chip Major Rev Read initial value 00h.
00+
+Value increments with chip revision.
3-0 Chip Minor Rev Read initial value 01h.
01+
+Value increments with chip revision.
12h
Rd_Reg
Read
7-4 Reserved
Reserved
N/A
3 PNLCLK_Lock Read PNLCLK lock status
N/A
2 MCLK_Lock
Read MCLK lock status
N/A
1 Pixel PLL_Lock Read pixel PLL lock status
N/A
0 DPA_Lock
Read DPA lock status
N/A
13h-1Fh Reserved
N/A
20h
PNLCLK-M R/W. D-PK. 7-0 PNLCLK_M
Select value for PNLCLK M Reference Divider
0
21h
PNLCLK-N
R/W. D-PK. 7-0 PNLCLK_N
Select value for PNLCLK N Feedback Divider
0
22h
PNLCLK-SS0 R/W. D-PK. 7-0 PNLCLK_SS0 Select value for PNLCLK spread-spectrum counter
0
LSBs bits 7-0
23h
PNLCLK-SS1 R/W. D-PK. 7-4 Reserved
Reserved
0
3-0 PNLCLK_SS1 Select value for PNLCLK spread-spectrum counter
0
MSBs bits 11-8
24h
PNLCLK-SSOE R/W. D-PK. 7-6 PNLCLK_SS
Select PNLCLK spread-spectrum gain
0
5 Reserved
Reserved
0
4-2 PNLCLK_PFD Select PNLCLK Phase/Frequency Detector gain
0
1-0 PNLCLK_OSD Select value for PNLCLK Output Scaler Divider
0
25h
PNLCLK-OE R/W
7-3 Reserved
Reserved
0
2 CLK_SEL
Select input for PNLCLK PLL
0
1 PNLCLK_SSENB Enable PNLCLK spread-spectrum
0
0 PNLCLK_OE
Enable PNLCLK output
0
26h
MCLK-M
R/W. D-MK. 7-0 MCLK_M
Select value for MCLK M Reference Divider
0
27h
MCLK-N
R/W. D-MK. 7-0 MCLK_N
Select value for MCLK N Feedback Divider
0
28h
MCLK-SS0 R/W. D-MK. 7-0 MCLK_SS0
Select MCLK spread-spectrum counter LSBs bits 7-0
0
29h
MCLK-SS1 R/W. D-MK. 7-4 Reserved
3-0 MCLK_SS1
Reserved
0
Select MCLK spread-spectrum counter MSBs bits 11-8 0
2Ah
MCLK-SSOE R/W. D-MK. 7-6 MCLK_SS
Select MCLK spread-spectrum gain
0
5 Reserved
Reserved
0
4-2 MCLK_PFD
Select MCLK Phase/Frequency Detector gain
0
1-0 MCLK_OSD
Select value for MCLK Output Scaler Divider
0
2Bh
MCLK-OE
R/W
7-2 Reserved
Reserved
0
1 MCLK_SSENB Enable MCLK spread-spectrum
0
0 MCLK_OE
Enable MCLK output
0
ICS1531 Rev N 12/1/99
Copyright © 1999, Integrated Circuit Systems, Inc.
All rights reserved.
25
December, 1999