ICS1531 Datasheet, PDF (45/76 Pages) Integrated Circuit Systems – Triple 8-bit MSPS A/D Converters with Line-Locked Clock Generator

ICS1531 Data Sheet - Preliminary
Chapter 6 Register Set
6.5.29 Register 2Ch: OUTPUT MUX
The OUTPUT MUX Register is used to select the source for the REF pin and STATUS pin (an active-low
pin formerly called ‘LOCK’).
Table 6-29 refers to ADC_FUNC, an internally generated signal that is delayed so it is in the same domain
as the internal ADC_CLK signal. Functionally, depending on the setting of Reg 06:3, ADC_FUNC is
equivalent to either ADCSYNC (which provides recovered HSYNC) or the input HSYNC.
Table 6-29. OUTPUT MUX Register
Bit Bit Name
Bit Definition
Ac- Spec. Re-
cess Func. set
2C:7 High_Drive
High Drive.
This bit selects a drive strength for all analog-to-digital
converter outputs.
• 0 = Drive strength is normal strength.
• 1 = Drive strength is doubled.
–
–
0
2C:6 OE_OSC
Output Enable for OSCOUT.
• 0 = Disable OSCOUT output.
• 1 = Enable OSCOUT output.
R/W
–
1
2C:5- OSC_Sel [1-0] OSCOUT (Multiplexer) Select [1-0].
R/W
–
0
2C:4
These bits select the output from a 4-way multiplexer (MUX) to
the OSCOUT pin.
• 0 = The OSCOUT source is OSC.
• 1 = The OSCOUT source is OSC/2.
• 2 = The OSCOUT source is OSCDIVIDER.
• 3 = The OSCOUT source is a reserved value.
2C:3 Reserved
Reserved.
• See Section 6.1, “Reserved Bits”.
• This bit must be programmed to ‘0’.
–
–
0
2C:2 REF_Sel
REF (Status) Select.
R/W
–
0
This bit selects the REF pin reference output as follows:
• 0 = The REF output source is from the input to the pixel PLL
PDINPUT (the Phase/Frequency Detector Input).
• 1 = The REF output source is from ADC_FUNC. (For more
information on ADC_FUNC, see Section 6.5.7, “Register
06h: Output Enables”.)
2C:1- LCKSEL [1-0] (PLL) Lock (Status) Select [1-0].
R/W
–
1
2C:0
These bits select the lock status output for the active-low
STATUS pin (formerly called ‘LOCK’.)
• 0 = The lock status output is for the pixel PLL.
• 1 = The lock status output is for the Dynamic Phase Adjust.
• 2 = The lock status output is for PNLCLK.
• 3 = The lock status output is for MCLK.
ICS1531 Rev N 12/1/99
Copyright © 1999, Integrated Circuit Systems, Inc.
All rights reserved.
45
December, 1999