ICS1531 Datasheet, PDF (36/76 Pages) Integrated Circuit Systems – Triple 8-bit MSPS A/D Converters with Line-Locked Clock Generator

ICS1531 Data Sheet - Preliminary
Chapter 6 Register Set
6.5.13 Register 10h: Chip Ver
The Chip Ver (Chip Version) Register is used to read the version number of the ICS1531.
Table 6-14. Chip Ver Register
Bit
Bit Name
10:7- Chip Ver [7-0]
10:0
Bit Definition
Ac- Spec. Re-
cess Func. set
Chip Version [7-0].
Read –
1F
• This register indicates the version number of the ICS chip.
• For the ICS1531, these bits have a value of 31 decimal
(that is, 1F hex), as in 1531.
6.5.14 Register 11h: Chip Rev
The Chip Rev (Chip Revision) Register is used to read the revision level of the ICS1531 chip.
Table 6-15. Chip Rev Register
Bit
Bit Name
Bit Definition
11:7- Chip Major Rev
11:4 [3-0]
11:3- Chip Minor Rev
11:0 [3-0]
Chip Major Revision [3-0].
The value of these bits:
• Indicate a ICS1531 major revision.
• Increment (+) with each all-layer revision.
• Have an initial (reset) value of 00h.
Chip Minor Revision [3-0].
The value of these bits:
• Indicate a ICS1531 minor revision.
• Increment (+) with each all-layer revision.
• Have an initial (reset) value of 01h.
Ac- Spec. Re-
cess Func. set
Read IN-A 00+
Read IN-A 01+
ICS1531 Rev N 12/1/99
Copyright © 1999, Integrated Circuit Systems, Inc.
All rights reserved.
36
December, 1999