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MC68340FE16E Datasheet, PDF (97/441 Pages) Freescale Semiconductor, Inc – Integrated Processor with DMA User’s Manual
Freescale Semiconductor, Inc.
CLKOUT
VCO
LOCK
VCC
RESET
328 ×
TCLKIN
BUS
CYCLES
BUS STATE
UNKNOWN
NOTES:
1. Internal start-up time.
2. SSP read here.
3. PC read here.
4. First instruction fetched here.
512 ×
TCLKOUT
≤ 14 CLOCKS
ADDRESS AND
CONTROL SIGNALS
THREE-STATED
1
2
3
4
Figure 3-28. Power-Up Reset Timing Diagram
When a RESET instruction is executed, the MC68340 drives the RESET signal for 512
clock cycles. The SIM40 registers and the module control registers in each internal
peripheral module (DMA, timers, and serial modules) are not affected. All other peripheral
module registers are reset the same as for a hardware reset. The external devices
connected to the RESET signal are reset at the completion of the RESET instruction.
3-48
MC68340 USER’S MANUAL
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