MC68340FE16E Datasheet, PDF (247/441 Pages) Freescale Semiconductor, Inc – Integrated Processor with DMA User’s Manual

Freescale Semiconductor, Inc.
5.7.3.11 CONDITIONAL BRANCH INSTRUCTIONS. The conditional branch instruction
table indicates the number of clock periods needed for the processor to perform the
specified branch on the given branch size, with complete execution times given. No
additional tables are needed to calculate total effective execution time for these
instructions. The total number of clock cycles is outside the parentheses. The numbers
inside parentheses (r/p/w) are included in the total clock cycle number. All timing data
assumes two-clock reads and writes.
Instruction
Bcc (taken)
Bcc.B (not taken)
Bcc.W (not taken)
Bcc.L (not taken)
DBcc (T, not taken)
DBcc (F, −1, not taken)
DBcc (F, not −1, taken)
DBcc (T, not taken)
DBcc (F, −1, not taken)
DBcc (F, not −1, taken)
∗ = In loop mode
Head
Tail
2
−2
2
0
0
0
0
0
1
1
2
0
6
−2
4
0
6
0
6
0
Cycles
8(0/2/0)
4(0/1/0)
4(0/2/0)
6(0/3/1)
4(0/2/0)
6(0/2/0)
10(0/2/0)
6(0/1/0)∗
8(0/1/0)∗
10(0/0/0)∗
5-110
MC68340 USER’S MANUAL
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