MC68340FE16E Datasheet, PDF (132/441 Pages) Freescale Semiconductor, Inc – Integrated Processor with DMA User’s Manual

Freescale Semiconductor, Inc.
4.3.5.5 PORT B PIN ASSIGNMENT REGISTER (PPARB). PPARB controls the function
of each port B pin. Any set bit defines the corresponding pin to be an IRQ≈ input or CS≈
as defined in Table 4-5. Any cleared bit defines the corresponding pin to be a discrete I/O
pin (or CS≈ if the FIRQ bit of the MCR is zero) controlled by the port B data and data
direction registers. The MODCK signal has no function after reset. PPARB is configured to
all ones at reset to provide for MODCK, IRQ7, IRQ6, IRQ5, IRQ3, and CS3–CS0. This
register can be read or written at any time.
PPARB
$01F
7
6
5
4
3
2
1
0
PPARB7 PPARB6 PPARB5 PPARB4 PPARB3 PPARB2 PPARB1 PPARB0
(IRQ7) (IRQ6) (IRQ5) (IRQ4) (IRQ3) (IRQ2) (IRQ1) (MODCK)
RESET:
1
1
1
1
1
1
1
1
Supervisor Only
4.3.5.6 PORT B DATA DIRECTION REGISTER (DDRB). DDRB controls the direction of
the pin drivers when the pins are configured as I/O. Any set bit configures the
corresponding pin as an output; any cleared bit configures the corresponding pin as an
input. This register affects only pins configured as discrete I/O. This register can be read
or written at any time.
DDRB
$01D
7
6
5
4
3
2
1
0
DD7 DD6 DD5 DD4 DD3 DD2 DD1 DD0
RESET:
0
0
0
0
0
0
0
0
Supervisor/User
4.3.5.7 PORT B DATA REGISTER (PORTB, PORTB1). This is a single register that can
be accessed at two different addresses. This register affects only those pins configured as
discrete I/O. A write is stored in the internal data latch, and if any port B pin is configured
as an output, the value stored for that bit is driven on the pin. A read of this register
returns the value stored in the register only if the pin is configured as a discrete output.
Otherwise, the value read is the value of the pin. This register can be read or written at
any time.
PORTB, PORTB1
7
6
5
4
P7
P6
P5
P4
RESET:
U
U
U
U
$019, 01B
3
2
1
0
P3
P2
P1
P0
U
U
U
U
Supervisor/User
MOTOROLA
MC68340 USER’S MANUAL
4-35
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