MC68340FE16E Datasheet, PDF (62/441 Pages) Freescale Semiconductor, Inc – Integrated Processor with DMA User’s Manual

Freescale Semiconductor, Inc.
S0 S2 S4 S0 S2 S4 S0 S2 S4 S0
CLKOUT
S2 S4 S0 S2 S4 S0 S2 S4
A31–A0
FC3–FC0
R/W
AS
DS
SIZ0
4 BYTES
SIZ1
2 BYTES
2 BYTES
4 BYTES
2 BYTES
2 BYTES
DSACK0
DSACK1
D15–D8
OP0
OP2
OP0
OP0
OP2
OP0
D7–D0
OP1
OP3
OP1
LONG WORD READ
FROM 16-BIT BUS
WORD READ
FROM 16-BIT BUS
OP1
OP3
LONG WORD WRITE TO
16-BIT BUS
OP1
WORD
WRITE TO
16-BIT BUS
Figure 3-5. Long-Word and Word Read and Write Timing—16-Bit Port
The MC68340 drives the address bus with the desired address and drives the SIZx pins to
indicate a long-word operand. For a read operation, the slave responds by placing the two
most significant bytes of the operand on bits 15–0 of the data bus and asserting DSACK1
to indicate a 16-bit port. The MC68340 reads the two most significant bytes of the operand
(bytes 0 and 1) from bits 15–0. The MC68340 then decrements the transfer size counter
by 2, increments the address by 2, initiates a new cycle, and reads bytes 2 and 3 of the
operand from bits 15–0 of the data bus.
For a write operation, the MC68340 drives the two most significant bytes of the operand
on bits 15–0 of the data bus. The slave device then reads the two most significant bytes of
the operand (bytes 0 and 1) from bits 15–0 of the data bus and asserts DSACK1 to
indicate reception and a 16-bit port. The MC68340 then decrements the transfer size
counter by 2, increments the address by 2, and writes bytes 2 and 3 of the operand to bits
15–0 of the data bus.
MOTOROLA
MC68340 USER’S MANUAL
3-13
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