MC68340FE16E Datasheet, PDF (240/441 Pages) Freescale Semiconductor, Inc – Integrated Processor with DMA User’s Manual

Freescale Semiconductor, Inc.
The numbers inside parentheses (r/p/w) are included in the total clock cycle number. All
timing data assumes two-clock reads and writes.
Instruction
ADD(A)
Rn, Rm
ADD(A)
〈FEA〉, Rn
ADD
Dn, 〈FEA 〉
AND
Dn, Dm
AND
〈FEA〉, Dn
AND
Dn, 〈FEA 〉
EOR
Dn, Dm
EOR
Dn, 〈FEA 〉
OR
Dn, Dm
OR
〈FEA〉, Dn
OR
Dn, 〈FEA 〉
SUB(A)
Rn, Rm
SUB(A)
〈FEA〉, Rn
SUB
Dn, 〈FEA 〉
CMP(A)
Rn, Rm
CMP(A)
CMP2 (Save) ^*
〈FEA〉, Rn
〈FEA〉, Rn
CMP2 (Op)
〈FEA〉, Rn
MUL(su).W
〈FEA〉, Dn
MUL(su).L (Save) ^* 〈FEA〉, Dn
MUL(su).L (Op) 〈FEA〉, Dl
MUL(su).L (Op) 〈FEA〉, Dn:Dl
DIVU.W
〈FEA〉, Dn
DIVS.W
DIVU.L (Save)^*
〈FEA〉, Dn
〈FEA〉, Dn
DIVU.L (Op)
DIVS.L (Save) ^*
〈FEA〉, Dn
〈FEA〉, Dn
DIVS.L (Op)
〈FEA〉, Dn
TBL(su)
TBL(su) (Save) ^*
Dn:Dm, Dp
〈CEA〉, Dn
TBL(su) (Op)
〈CEA〉, Dn
TBLSN
TBLSN (Save)^*
Dn:Dm, Dp
〈CEA〉, Dn
TBLSN (Op)
〈CEA〉, Dn
Head
Tail
0
0
0
0
0
3
0
0
0
0
0
3
0
0
0
3
0
0
0
0
0
3
0
0
0
0
0
3
0
0
0
0
1
1
2
0
0
0
1
1
2
0
2
0
0
0
0
0
1
1
2
0
1
1
2
0
26
0
1
1
6
0
30
0
1
1
6
0
Cycles
2(0/1/0)
2(0/1/0)
5(0/1/x)
2(0/1/0)
2(0/1/0)
5(0/1/x)
2(0/1/0)
5(0/1/x)
2(0/1/0)
2(0/1/0)
5(0/1/x)
2(0/1/0)
2(0/1/0)
5(0/1/x)
2(0/1/0)
2(0/1/0)
3(0/1/0)
16-18(X/1/0)
26(0/1/0)
3(0/1/0)
46-52(0/1/0)
46(0/1/0)
32(0/1/0)
42(0/1/0)
3(0/1/0)
<46(0/1/0)
3(0/1/0)
<62(0/1/0)
28-30(0/2/0)
3(0/1/0)
33-35(2X/1/0)
30-34(0/2/0)
3(0/1/0)
35-39(2X/1/0)
MOTOROLA
MC68340 USER’S MANUAL
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