MC68340FE16E Datasheet, PDF (44/441 Pages) Freescale Semiconductor, Inc – Integrated Processor with DMA User’s Manual

Freescale Semiconductor, Inc.
IPIPE
This active-low output signal is used to track movement of words through the instruction
pipeline.
DSO
This development serial output signal helps to provide serial communications for
background debug mode.
2.11.3 Breakpoint (BKPT)
This pin functions as BKPT in normal operation and as DSCLK in background debug
mode.
BKPT
This active-low input signal is used to signal a hardware breakpoint to the CPU32.
DSCLK
This development serial clock input helps to provide serial communications for
background debug mode.
2.11.4 Freeze (FREEZE)
Assertion of this active-high output signal indicates that the CPU32 has acknowledged a
breakpoint and has initiated background mode operation.
2.12 DMA MODULE SIGNALS
The following signals are used by the direct memory access (DMA) controller module to
provide external handshake for either a source or destination. See Section 6 DMA
Module for additional information on these signals.
2.12.1 DMA Request (DREQ2, DREQ1)
This active-low input is asserted by a peripheral device to request an operand transfer
between that peripheral and memory. The assertion of DREQ≈ starts the DMA process.
The assertion level in external burst mode is level sensitive; in external cycle steal mode,
it is falling-edge sensitive.
2.12.2 DMA Acknowledge (DACK2, DACK1)
This active-low output is asserted by the DMA to signal to a peripheral that an operand is
being transferred in response to a previous transfer request.
2.12.3 DMA Done (DONE2, DONE1)
This active-low bidirectional signal is asserted by the DMA or a peripheral device during
any DMA bus cycle to indicate that the last data transfer is being performed. DONE≈ is an
active input in any mode. As an output, it is only active in external request mode. An
external pullup resistor is required even during operation in the internal request mode.
2-10
MC68340 USER’S MANUAL
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