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MC68340FE16E Datasheet, PDF (78/441 Pages) Freescale Semiconductor, Inc – Integrated Processor with DMA User’s Manual | |||
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Freescale Semiconductor, Inc.
S0
S2
S4
S0 0â2 CLOCKS* S1 S2
S4
CLKOUT
A31âA4
A3âA1
INTERRUPT LEVEL
A0
FC3âFC0
CPU SPACE
SIZ0
1 BYTE
SIZ1
R/W
S0
S2
AS
DS
DSACKx
D7âD0
D15âD8
VECTOR FROM 16-BIT PORT
VECTOR FROM 8-BIT PORT
IRQ7âIRQ1
IACK7âIACK1
READ
CYCLE
INTERNAL
ARBITRATION
IACK CYCLE
*Internal Arbitration may take between 0â2 clock cycles.
Figure 3-15. Interrupt Acknowledge Cycle Timing
WRITE
STACK
3.4.4.2 AUTOVECTOR INTERRUPT ACKNOWLEDGE CYCLE. When the interrupting
device cannot supply a vector number, it requests an automatically generated vector
(autovector). Instead of placing a vector number on the data bus and asserting DSACKâ,
the device asserts AVEC to terminate the cycle. If the DSACKâ signals are asserted
during an interrupt acknowledge cycle terminated by AVEC, the DSACKâ signals and
MOTOROLA
MC68340 USERâS MANUAL
3-29
For More Information On This Product,
Go to: www.freescale.com
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