MC68340FE16E Datasheet, PDF (19/441 Pages) Freescale Semiconductor, Inc – Integrated Processor with DMA User’s Manual

11/2/95
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LIST OF ILLUSTRATIONS (Continued)
Figure
Number
Title
Page
Number
4-5 MC68340 Crystal Oscillator..................................................................................4-10
4-6 Clock Block Diagram for External Oscillator Operation...................................4-11
4-7 Full Interrupt Request Multiplexer........................................................................4-16
4-8 SIM40 Programming Model..................................................................................4-19
5-1
5-2
5-3
5-4
5-5
5-6
5-7
5-8
5-9
5-10
5-11
5-12
5-13
5-14
5-15
5-16
5-17
5-18
5-19
5-20
5-21
5-22
5-23
5-24
5-25
5-26
5-27
5-28
5-29
5-30
5-31
5-32
5-33
5-34
5-35
5-36
CPU32 Block Diagram...........................................................................................5-3
Loop Mode Instruction Sequence .......................................................................5-3
User Programming Model.....................................................................................5-9
Supervisor Programming Model Supplement ..................................................5-9
Status Register........................................................................................................5-10
Instruction Word General Format.........................................................................5-12
Table Example 1.....................................................................................................5-30
Table Example 2.....................................................................................................5-31
Table Example 3.....................................................................................................5-33
Exception Stack Frame..........................................................................................5-42
Reset Operation Flowchart....................................................................................5-45
Format $0—Four-Word Stack Frame..................................................................5-60
Format $2—Six-Word Stack Frame ....................................................................5-60
Internal Transfer Count Register..........................................................................5-61
Format $C—BERR Stack for Prefetches and Operands..................................5-62
Format $C—BERR Stack on MOVEM Operand................................................5-62
Format $C—Four- and Six-Word BERR Stack..................................................5-63
In-Circuit Emulator Configuration ........................................................................5-64
Bus State Analyzer Configuration .......................................................................5-64
BDM Block Diagram...............................................................................................5-65
BDM Command Execution Flowchart.................................................................5-68
Debug Serial I/O Block Diagram..........................................................................5-70
Serial Interface Timing Diagram..........................................................................5-71
BKPT Timing for Single Bus Cycle......................................................................5-72
BKPT Timing for Forcing BDM .............................................................................5-72
BKPT/DSCLK Logic Diagram ..............................................................................5-72
Command-Sequence Diagram............................................................................5-75
Functional Model of Instruction Pipeline ............................................................5-87
Instruction Pipeline Timing Diagram...................................................................5-88
Block Diagram of Independent Resources ........................................................5-90
Simultaneous Instruction Execution....................................................................5-91
Attributed Instruction Times...................................................................................5-92
Example 1—Instruction Stream ...........................................................................5-95
Example 2—Branch Taken...................................................................................5-95
Example 2—Branch Not Taken............................................................................5-96
Example 3—Branch Negative Tail ......................................................................5-96
xviii
MC68340 USER'S MANUAL
MOTOROLA
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