MC68HC912BL16 Datasheet, PDF (84/128 Pages) Freescale Semiconductor, Inc – 16-Bit Microcontroller

Freescale Semiconductor, Inc.
TC7 — Timer Input Capture/Output Compare Register 7
Bit 7
6
5
4
3
2
Bit 15
14
13
12
11
10
Bit 7
6
5
4
3
2
$009E–$009F
1
Bit 0
9
Bit 8
1
Bit 0
Depending on the TIOS bit for the corresponding channel, these registers are used to latch the value
of the free-running counter when a defined transition is sensed by the corresponding input capture edge
detector or to trigger an output action for output compare.
Read anytime. Write anytime for output compare function. Writes to these registers have no meaning
or effect during input capture. All timer input capture/output compare registers are reset to $0000.
NOTE
Port T[6] is not bonded to any pin in MC68HC912BL16.
PACTL — Pulse Accumulator Control Register
Bit 7
6
5
4
3
2
1
Bit 0
0
PAEN PAMOD PEDGE CLK1
CLK0 PAOVI
PAI
RESET:
0
0
0
0
0
0
0
0
Read or write anytime.
PAEN — Pulse Accumulator System Enable
0 = Pulse accumulator system disabled
1 = Pulse accumulator system enabled
PAEN is independent from TEN.
PAMOD — Pulse Accumulator Mode
0 = Event counter mode
1 = Gated time accumulation mode
$00A0
PEDGE — Pulse Accumulator Edge Control
For PAMOD = 0 (event counter mode)
0 = Falling edges on the pulse accumulator input pin (PT7/PAI) cause the count to be incremented
1 = Rising edges on the pulse accumulator input pin cause the count to be incremented
For PAMOD = 1 (gated time accumulation mode)
0 = Pulse accumulator input pin high enables E ÷ 64 clock to pulse accumulator and the trailing fall-
ing edge on the pulse accumulator input pin sets the PAIF flag.
1 = Pulse accumulator input pin low enables E ÷ 64 clock to pulse accumulator and the trailing rising
edge on the pulse accumulator input pin sets the PAIF flag.
If the timer is not active (TEN = 0 in TSCR), there is no ÷64 clock since the E ÷ 64 clock is generated
by the timer prescaler.
CLK1, CLK0 — Clock Select Register
Table 28 Clock Selection
CLK1
0
0
1
1
CLK0
0
1
0
1
Selected Clock
Use timer prescaler clock as timer counter clock
Use PACLK as input to timer counter clock
Use PACLK/256 as timer counter clock frequency
Use PACLK/65536 as timer counter clock frequency
MC68HC912BL16
84
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