MC68HC912BL16 Datasheet, PDF (127/128 Pages) Freescale Semiconductor, Inc – 16-Bit Microcontroller

Freescale Semiconductor, Inc.
in all modes. Tagging is disabled when BDM becomes active and BDM serial commands cannot be pro-
cessed while tagging is active.
TAGHI is a shared function of the BKGD pin.
TAGLO is a shared function of the PE3/LSTRB pin, a multiplexed I/O pin. For 1/4 cycle before and after
the rising edge of the E clock, this pin is the LSTRB driven output.
TAGLO and TAGHI inputs are captured at the falling edge of the E clock. A logic zero on TAGHI and/
or TAGLO marks (tags) the instruction on the high and/or low byte of the program word that was on the
data bus at the same falling edge of the E clock.
Table 46 shows the functions of the two tagging pins. The pins operate independently; the state of one
pin does not affect the function of the other. The presence of logic level zero on either pin at the fall of
ECLK performs the indicated function. Tagging is allowed in all modes. Tagging is disabled when BDM
becomes active and BDM serial commands are not processed while tagging is active.
Table 46 Tag Pin Function
TAGHI
1
1
0
0
TAGLO
1
0
1
0
Tag
No Tag
Low Byte
High Byte
Both Bytes
The tag follows the information in the queue as the queue is advanced. When a tagged instruction
reaches the head of the queue, the CPU enters active background debugging mode rather than exe-
cuting the instruction. This is the mechanism by which a development system initiates hardware break-
points.
MC68HC912BL16TS/D
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