MC68HC912BL16 Datasheet, PDF (110/128 Pages) Freescale Semiconductor, Inc – 16-Bit Microcontroller

Freescale Semiconductor, Inc.
RST — Module Reset Bit
When set, this bit causes all registers and activity in the module to assume the same state as out of
power-on reset (except for ADPU bit in ATDCTL2, which remains set, allowing the ATD module to re-
main enabled).
TSTOUT — Multiplex Output of TST[3:0] (Factory Use)
TST[3:0] — Test Bits 3 to 0 (Reserved)
Selects one of 16 reserved factory testing modes.
PORTAD — Port AD Data Input Register
Bit 7
6
5
4
3
PAD7
PAD6
PAD5
PAD4
PAD3
RESET:
–
–
–
–
–
2
PAD2
–
1
PAD1
–
Bit 0
PAD0
–
$006F
PAD[7:0] — Port AD Data Input Bits
After reset these bits reflect the state of the input pins.
May be used for general-purpose digital input. When the software reads PORTAD, it obtains the digital
levels that appear on the corresponding port AD pins. Pins with signals not meeting V_IL or V_IH specifi-
cations will have an indeterminate value. Writes to this register have no meaning at any time.
ADR0H — ATD Converter Result Register 0
ADR0L — ATD Converter Result Register 0
ADR1H — ATD Converter Result Register 1
ADR1L — ATD Converter Result Register 1
ADR2H — ATD Converter Result Register 2
ADR2L — ATD Converter Result Register 2
ADR3H — ATD Converter Result Register 3
ADR3L — ATD Converter Result Register 3
ADR4H — ATD Converter Result Register 4
ADR4L — ATD Converter Result Register 4
ADR5H — ATD Converter Result Register 5
ADR5L — ATD Converter Result Register 5
ADR6H — ATD Converter Result Register 6
ADR6L — ATD Converter Result Register 6
ADR7H — ATD Converter Result Register 7
ADR7L — ATD Converter Result Register 7
$0070
$0071
$0072
$0073
$0074
$0075
$0076
$0077
$0078
$0079
$007A
$007B
$007C
$007D
$007E
$007F
ADDRxH Bit 15
14
13
12
11
10
ADDRxL Bit 7
6
0
0
0
0
RESET:
–
–
–
–
–
–
9
Bit 8
0
0
–
–
ADRxH[15:8] , ADRxL[7:0]— ATD Conversion Result
The reset condition for these registers is undefined.
These bits contain the left justified, unsigned result from the ATD conversion. When operating with 8 bit
resolution, bits 15 to 8 contain the 8 bit result, bits 7 and 6 are undefined, and bits 5 through 0 are zero.
When operating with 10 bit resolution, bits 15 to 6 contain the 10 bit result and bits 15 through 10 are
zero for the right jistified mode. The channel from which this result was obtained is dependent on the
conversion mode selected. These registers are always read-only in normal mode.
MC68HC912BL16
110
For More Information On This Product, _{MC68HC912BL16TS/D}
Go to: www.freescale.com