MC68HC912BL16 Datasheet, PDF (70/128 Pages) Freescale Semiconductor, Inc – 16-Bit Microcontroller

Freescale Semiconductor, Inc.
CON01 — Concatenate PWM Channels 0 and 1
When concatenated, channel 0 becomes the high-order byte and channel 1 becomes the low-order
byte. Channel 0 output pin is used as the output for this 16-bit PWM (bit 0 of port P). Channel 1 clock-
select control bits determine the clock source.
0 = Channels 0 and 1 are separate 8-bit PWMs.
1 = Channels 0 and 1 are concatenated to create one 16-bit PWM channel.
NOTE
These bits should be changed only when both corresponding channels are dis-
abled. For Left Aligned output mode operation when changing these bits the user
should write to the associated PWM counters as the LAST operation before en-
abling (setting PWENx = 1) the channels(s).
PCKA2 – PCKA0 — Prescaler for Clock A
Clock A is one of two clock sources which may be used for channels 0 and 1. These three bits determine
the rate of clock A, as shown in Table 23.
PCKB2 – PCKB0 — Prescaler for Clock B
Clock B is one of two clock sources which may be used for channels 2 and 3. These three bits determine
the rate of clock B, as shown in Table 23.
Table 23 Clock A and Clock B Prescaler
PCKA2
(PCKB2)
0
0
0
0
1
1
1
1
PCKA1
(PCKB1)
0
0
1
1
0
0
1
1
PCKA0
(PCKB0)
0
1
0
1
0
1
0
1
Value of
Clock A (B)
E
E÷2
E÷4
E÷8
E ÷ 16
E ÷ 32
E ÷ 64
E ÷ 128
PWPOL — PWM Clock Select and Polarity
Bit 7
6
5
4
PCLK3 PCLK2 PCLK1 PCLK0
RESET:
0
0
0
0
3
PPOL3
0
Read and write anytime.
PCLK3 — PWM Channel 3 Clock Select
0 = Clock B is the clock source for channel 3.
1 = Clock S1 is the clock source for channel 3.
PCLK2 — PWM Channel 2 Clock Select
0 = Clock B is the clock source for channel 2.
1 = Clock S1 is the clock source for channel 2.
PCLK1 — PWM Channel 1 Clock Select
0 = Clock A is the clock source for channel 1.
1 = Clock S0 is the clock source for channel 1.
2
PPOL2
0
1
PPOL1
0
Bit 0
PPOL0
0
$0041
MC68HC912BL16
70
For More Information On This Product, _{MC68HC912BL16TS/D}
Go to: www.freescale.com