MC68HC912BL16 Datasheet, PDF (107/128 Pages) Freescale Semiconductor, Inc – 16-Bit Microcontroller

Freescale Semiconductor, Inc.
Table 35 Clock Prescaler Values
Prescale Value Total Divisor
Max P Clock¹
Min P Clock²
00000
÷2
4 MHz
1 MHz
00001
÷4
8 MHz
2 MHz
00010
÷6
8 MHz
3 MHz
00011
÷8
8 MHz
4 MHz
00100
÷10
8 MHz
5 MHz
00101
÷12
8 MHz
6 MHz
00110
÷14
8 MHz
7 MHz
00111
÷16
8 MHz
8 MHz
01xxx
1xxxx
Do Not Use
NOTES:
1. Maximum conversion frequency is 2 MHz. Maximum P clock divisor value will become
maximum conversion rate that can be used on this ATD module.
2. Minimum conversion frequency is 500 kHz. Minimum P clock divisor value will become
minimum conversion rate that this ATD can perform.
ATDCTL5 — ATD Control Register 5
$0065
Bit 7
6
5
4
3
2
1
Bit 0
0
S8CM SCAN MULT
CD
CC
CB
CA
RESET:
0
0
0
0
0
0
0
0
The ATD control register 5 is used to select the conversion modes, the conversion channel(s), and ini-
tiate conversions.
Read or write anytime. A write to ATDCTL5 initiates a new conversion sequence. If a conversion se-
quence is in progress when a write occurs, that sequence is aborted and the SCF and CCF bits are
reset.
S8CM — Select 8 Channel Mode
0 = Conversion sequence consists of four conversions
1 = Conversion sequence consists of eight conversions
SCAN — Enable Continuous Channel Scan
0 = Single conversion sequence
1 = Continuous conversion sequences (scan mode)
When a conversion sequence is initiated by a write to the ATDCTL register, the user has a choice of
performing a sequence of four (or eight, depending on the S8CM bit) conversions or continuously per-
forming four (or eight) conversion sequences.
MULT — Enable Multichannel Conversion
0 = ATD sequencer runs all four or eight conversions on a single input channel selected via the
CD, CC, CB, and CA bits.
1 = ATD sequencer runs each of the four or eight conversions on sequential channels in a specific
group. Refer to Table 36.
CD, CC, CB, and CA — Channel Select for Conversion
MC68HC912BL16TS/D
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