English
Language : 

MC68HC912BL16 Datasheet, PDF (1/128 Pages) Freescale Semiconductor, Inc – 16-Bit Microcontroller
Freescale Semiconductor, Inc. Order this document
by MC68HC912BL16TS/D
MC68HC912BL16
Technical Summary
16-Bit Microcontroller
1 Introduction
The MC68HC912BL16 microcontroller unit (MCU) is a 16-bit device composed of standard on-chip pe-
ripherals including a 16-bit central processing unit (CPU12), 16-Kbyte flash EEPROM, 512-byte RAM,
512-byte EEPROM, an asynchronous serial communications interface (SCI), a serial peripheral inter-
face (SPI), an 7-channel timer and 16-bit pulse accumulator, an 10-bit analog-to-digital converter
(ADC), and a four-channel pulse-width modulator (PWM). System resource mapping, clock generation,
interrupt control and bus interfacing are managed by the Lite integration module (LIM). The
MC68HC912BL16 has full 16-bit data paths throughout, however, the multiplexed external bus can op-
erate in an 8-bit narrow mode so single 8-bit wide memory can be interfaced for lower cost systems.
1.1 Features
• 16-Bit CPU12
— Upward Compatible with M68HC11 Instruction Set
— Interrupt Stacking and Programmer’s Model Identical to M68HC11
— 20-Bit ALU
— Instruction Queue
— Enhanced Indexed Addressing
— Fuzzy Logic Instructions
• Multiplexed Bus
— Single Chip or Expanded
— 16/16 Wide or 16/8 Narrow Modes
• Memory
— 16-Kbyte Flash EEPROM with 2-Kbyte Erase-Protected Boot Block
— 512-byte EEPROM
— 512-byte RAM with Single-Cycle Access for Aligned or Misaligned Read/Write
• 8-Channel, 10-bit Analog-to-Digital Converter
• 7-Channel Timer
— Each Channel Fully Configurable as Either Input Capture or Output Compare
— Simple PWM Mode
— Modulo Reset of Timer Counter
• 16-Bit Pulse Accumulator
— External Event Counting
— Gated Time Accumulation
• Pulse-Width Modulator
— 8-Bit, 4-Channel or 16-Bit, 2-Channel
— Separate Control for Each Pulse Width and Duty Cycle
— Programmable Center-Aligned or Left-Aligned Outputs
• Serial Interfaces
For MorGeoIntfooP:rRwmEwLaItwMioI.NfnAreROeYnscTahlies.cPoromduct,
REV. 1