MC68HC912BL16 Datasheet, PDF (7/128 Pages) Freescale Semiconductor, Inc – 16-Bit Microcontroller

Freescale Semiconductor, Inc.
2.2 Data Types
The CPU12 supports the following data types:
• Bit data
• 8-bit and 16-bit signed and unsigned integers
• 16-bit unsigned fractions
• 16-bit addresses
A byte is eight bits wide and can be accessed at any byte location. A word is composed of two consec-
utive bytes with the most significant byte at the lower value address. There are no special requirements
for alignment of instructions or operands.
2.3 Addressing Modes
Addressing modes determine how the CPU accesses memory locations to be operated upon. The
CPU12 includes all of the addressing modes of the M68HC11 CPU as well as several new forms of in-
dexed addressing. Table 2 is a summary of the available addressing modes.
Table 2 M68HC12 Addressing Mode Summary
Addressing Mode
Inherent
Immediate
Source Format
INST
(no externally supplied
operands)
INST #opr8i
or
INST #opr16i
Direct
INST opr8a
Extended
Relative
Indexed
(5-bit offset)
Indexed
(auto pre-decrement)
Indexed
(auto pre-increment)
Indexed
(auto post-
decrement)
Indexed
(auto post-increment)
Indexed
(accumulator offset)
Indexed
(9-bit offset)
Indexed
(16-bit offset)
INST opr16a
INST rel8
or
INST rel16
INST oprx5,xysp
INST oprx3,–xys
INST oprx3,+xys
INST oprx3,xys–
INST oprx3,xys+
INST abd,xysp
INST oprx9,xysp
INST oprx16,xysp
Indexed-Indirect
(16-bit offset)
INST [oprx16,xysp]
Indexed-Indirect
(D accumulator
offset)
INST [D,xysp]
Abbreviation
INH
IMM
DIR
EXT
REL
IDX
IDX
IDX
IDX
IDX
IDX
IDX1
IDX2
[IDX2]
[D,IDX]
Description
Operands (if any) are in CPU registers
Operand is included in instruction stream
8- or 16-bit size implied by context
Operand is the lower 8-bits of an address in the
range $0000 – $00FF
Operand is a 16-bit address
An 8-bit or 16-bit relative offset from the current
pc is supplied in the instruction
5-bit signed constant offset from x, y, sp, or pc
Auto pre-decrement x, y, or sp by 1 ~ 8
Auto pre-increment x, y, or sp by 1 ~ 8
Auto post-decrement x, y, or sp by 1 ~ 8
Auto post-increment x, y, or sp by 1 ~ 8
Indexed with 8-bit (A or B) or 16-bit (D) accumu-
lator offset from x, y, sp, or pc
9-bit signed constant offset from x, y, sp, or pc
(lower 8-bits of offset in one extension byte)
16-bit constant offset from x, y, sp, or pc
(16-bit offset in two extension bytes)
Pointer to operand is found at...
16-bit constant offset from x, y, sp, or pc
(16-bit offset in two extension bytes)
Pointer to operand is found at...
x, y, sp, or pc plus the value in D
MC68HC912BL16TS/D
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