MC68HC908LJ12 Datasheet, PDF (74/413 Pages) Freescale Semiconductor, Inc – 8-bit microcontroller units

Configuration Registers (CONFIG)
5.5 Configuration Register 2 (CONFIG2)
Address:
Read:
Write:
Reset:
$001D
Bit 7
0
0
6
5
4
3
2
1
Bit 0
STOP_
IRCDIS
STOP_
XCLKEN
DIV2CLK
PCEH
PCEL LVISEL1 LVISEL0
0
0
= Unimplemented
0
0
0
0^††
0^††
†† Reset by POR only.
Figure 5-3. Configuration Register 2 (CONFIG2)
STOP_IRCDIS — Internal RC Oscillator Stop Mode Disable
Setting STOP_IRCDIS disables the internal RC oscillator during stop
mode. When this bit is cleared, the internal RC oscillator continues to
operate in stop mode. Reset clears this bit.
1 = Internal RC oscillator disabled during stop mode
0 = Internal RC oscillator enabled during stop mode
STOP_XCLKEN — Crystal Oscillator Stop Mode Enable
Setting STOP_XCLKEN enables the external crystal (XTAL) oscillator
to continue operating during stop mode. This is useful for driving the
real time clock module to allow it to generate periodic wake-up while
in stop mode. When this bit is cleared, the external XTAL oscillator will
be disabled during stop mode. Reset clears this bit.
1 = XTAL oscillator enabled during stop mode
0 = XTAL oscillator disabled during stop mode
DIV2CLK — Divide-by-2 Clock Bypass
When CGMXCLK is selected to drive the system clocks (BCS=0),
setting DIV2CLK allows the CGMXCLK to bypass the divide-by-2
divider in the CGM module; CGMOUT will equal CGMXCLK and bus
clock will equal CGMXCLK divide-by-2.
DIV2CLK bit has no effect when the BCS=1 in the PLL control
register (CGMVCLK selected and divide-by-2 always enabled). Reset
clears this bit.
1 = Divide-by-2 divider bypassed;
When BSC=0, CGMOUT equals CGMXCLK
0 = Divide-by-2 divider enabled;
When BSC=0, CGMOUT equals CGMXCLK divide-by-2
MC68HC908LJ12 — Rev. 2.1
Freescale Semiconductor
Configuration Registers (CONFIG)
Technical Data
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