MC68HC908LJ12 Datasheet, PDF (322/413 Pages) Freescale Semiconductor, Inc – 8-bit microcontroller units

Liquid Crystal Display Driver (LCD)
16.5.2 LCD Voltages (V_LCD, V_LCD1, V_LCD2, V_LCD3)
The voltage V_LCD is connected directly to V_DD. V_LCD1, V_LCD2, and V_LCD3
are internal bias voltages for the LCD driver waveforms. They are
derived from V_LCD using a resistor ladder (see Figure 16-3).
The relative potential of the LCD voltages are:
• V_LCD = V_DD
• V_LCD1 = 2/3 × (V_LCD – V_bias)
• V_LCD2 = 1/3 × (V_LCD – V_bias)
• V_LCD3 = V_bias
The V_LCD3 bias voltage, V_bias, is controlled by the LCD contrast control
bits, LCCON[2:0].
16.5.3 LCD Cycle Frame
The LCD driver module uses the CGMXCLK (see Section 7. Oscillator
(OSC)) as the input reference clock. This clock is divided to produce the
LCD waveform base clock, LCDCLK, by configuring the LCLK[2:0] bits
in the LCD clock register. The LCDCLK clocks the backplane and the
frontplane output waveforms.
The LCD cycle frame is determined by the equation:
1
LCD CYCLE FRAME =
LCD WAVEFORM BASE CLOCK × DUTY
For example, for 1/3 duty and 256Hz waveform base clock:
1
LCD CYCLE FRAME =
256 × (1/3)
= 11.72 ms
MC68HC908LJ12 — Rev. 2.1
Freescale Semiconductor
Liquid Crystal Display Driver (LCD)
Technical Data
323