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MC68HC908LJ12 Datasheet, PDF (220/413 Pages) Freescale Semiconductor, Inc – 8-bit microcontroller units | |||
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Real Time Clock (RTC)
MINF â Minute Flag
This clearable, read-only bit is set on every increment of the minute
counter. When the MINIE bit in RTCCR1 is set, MINF generates a
CPU interrupt request. In normal operation, clear the MINF bit by
reading RTCSR with MINF set and then reading the minute register
(MINR). Reset clears MINF.
1 = Minute counter incremented
0 = No minute counter incremented
SECF â Second Flag
This clearable, read-only bit is set on every increment of the second
counter. When the SECIE bit in RTCCR1 is set, SECF generates a
CPU interrupt request. In normal operation, clear the SECF bit by
reading RTCSR with SECF set and then reading the second register
(SECR). Reset clears SECF.
1 = Second counter incremented
0 = No second counter incremented
TB1F â Timebase 1 Flag
This clearable, read-only bit is set on every tick of the timebase 1
counter (every 0.5 seconds). When the TB1IE bit in RTCCR1 is set,
TB1F generates a CPU interrupt request. In normal operation, clear
the TB1F bit by reading RTCSR with TB1F set and then reading the
chronograph register (CHRR). Reset clears TB1F.
1 = A timebase 1 tick (0.5s) has occurred
0 = No timebase 1 tick has occurred
TB2F â Timebase 2 Flag
This clearable, read-only bit is set on every tick of the timebase 2
counter (every 0.25 seconds). When the TB2IE bit in RTCCR1 is set,
TB2F generates a CPU interrupt request. In normal operation, clear
the TB2F bit by reading RTCSR with TB2F set and then reading the
chronograph register (CHRR). Reset clears TB2F.
1 = A timebase 2 tick (0.25s) has occurred
0 = No timebase 2 tick has occurred
MC68HC908LJ12 â Rev. 2.1
Freescale Semiconductor
Real Time Clock (RTC)
Technical Data
221
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