MC68HC908LJ12 Datasheet, PDF (214/413 Pages) Freescale Semiconductor, Inc – 8-bit microcontroller units

Real Time Clock (RTC)
12.4.5 Chronograph Functions
A 100Hz resolution chronograph counter can be enabled by setting the
CHRE bit. The chronograph counter will automatically roll over to zero
when the counter reaches 99. If 32.768kHz CGMXCLK is used, the
chronograph counter resolution becomes 128Hz. With either 100Hz or
128Hz resolution, the counter value is converted to 100Hz, before it is
saved in the chronograph data register. Therefore, each chronograph
data register increment represents 10ms.
12.5 Low-Power Modes
The STOP and WAIT instructions put the MCU in low power-
consumption standby modes.
12.5.1 Wait Mode
The RTC module continues normal operation in wait mode. Any enabled
CPU interrupt request from the RTC can bring the MCU out of wait
mode. If the RTC is not required to bring the MCU out of wait mode,
power down the RTC by clearing the RTCE bit before executing the
WAIT instruction.
12.5.2 Stop Mode
For continuous RTC operation in stop mode, the oscillator stop mode
enable bit (STOP_XCLKEN in CONFIG2 register) must be set before
executing the STOP instruction. When STOP_XCLKEN is set,
CGMXCLK continues to drive the RTC module, and any enabled CPU
interrupt request from the RTC can bring the MCU out of stop mode.
If STOP_XCLKEN bit is cleared, the RTC module is inactive after the
execution of a STOP instruction. The STOP instruction does not affect
RTC register states. RTC module operation resumes after an external
interrupt. To further reduce power consumption, the RTC module should
be powered-down by clearing the RTCE bit before executing the STOP
instruction.
MC68HC908LJ12 — Rev. 2.1
Freescale Semiconductor
Real Time Clock (RTC)
Technical Data
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