MC68HC908LJ12 Datasheet, PDF (112/413 Pages) Freescale Semiconductor, Inc – 8-bit microcontroller units

Clock Generator Module (CGM)
10. Program the PLL registers accordingly:
a. In the PRE bits of the PLL control register (PCTL), program
the binary equivalent of P.
b. In the VPR bits of the PLL control register (PCTL), program
the binary equivalent of E.
c. In the PLL multiplier select register low (PMSL) and the PLL
multiplier select register high (PMSH), program the binary
equivalent of N.
d. In the PLL VCO range select register (PMRS), program the
binary coded equivalent of L.
e. In the PLL reference divider select register (PMDS), program
the binary coded equivalent of R.
NOTE: The values for P, E, N, L, and R can only be programmed when the PLL
is off (PLLON = 0).
Table 8-1 provides numeric examples (numbers are in hexadecimal
notation):
Table 8-1. Numeric Examples
CGMVCLK CGMPCLK
f_BUS
f_RCLK
R N PE L
8.0 MHz
8.0 MHz
2.0 MHz 32.768 kHz 1 F5 0 0 D1
9.8304 MHz 9.8304 MHz 2.4576 MHz 32.768 kHz 1 12C 0 1 80
10.0 MHz
10.0 MHz
2.5 MHz 32.768 kHz 1 132 0 1 83
16 MHz
16 MHz
4.0 MHz 32.768 kHz 1 1E9 0 1 D1
19.6608 MHz 19.6608 MHz 4.9152 MHz 32.768 kHz 1 258 0 2 80
20 MHz
20 MHz
5.0 MHz 32.768 kHz 1 263 0 2 82
29.4912 MHz 29.4912 MHz 7.3728 MHz 32.768 kHz 1 384 0 2 C0
32 MHz
32 MHz
8.0 MHz 32.768 kHz 1 3D1 0 2 D0
32 MHz
16 MHz
4.0 MHz 32.768 kHz 1 1E9 1 2 D0
32 MHz
8 MHz
2.0 MHz 32.768 kHz 1 F5 2 2 D0
32 MHz
4 MHz
1.0 MHz 32.768 kHz 1 7B 3 2 D0
MC68HC908LJ12 — Rev. 2.1
Freescale Semiconductor
Clock Generator Module (CGM)
Technical Data
113