MC68HC908LJ12 Datasheet, PDF (205/413 Pages) Freescale Semiconductor, Inc – 8-bit microcontroller units

Timer Interface Module (TIM)
When ELSxB:ELSxA = 0:0, this read/write bit selects the initial output
level of the TCHx pin. See Table 11-3. Reset clears the MSxA bit.
1 = Initial output level low
0 = Initial output level high
NOTE:
Before changing a channel function by writing to the MSxB or MSxA bit,
set the TSTOP and TRST bits in the TIM status and control register
(TSC).
ELSxB and ELSxA — Edge/Level Select Bits
When channel x is an input capture channel, these read/write bits
control the active edge-sensing logic on channel x.
When channel x is an output compare channel, ELSxB and ELSxA
control the channel x output behavior when an output compare
occurs.
When ELSxB and ELSxA are both clear, channel x is not connected
to an I/O port, and pin TCHx is available as a general-purpose I/O pin.
Table 11-3 shows how ELSxB and ELSxA work. Reset clears the
ELSxB and ELSxA bits.
Table 11-3. Mode, Edge, and Level Selection
MSxB:MSxA ELSxB:ELSxA
Mode
X0
00
Output preset
X1
00
00
01
00
10
Input capture
00
11
01
01
Output
01
10
compare or
PWM
01
11
1X
01
Buffered
1X
10
output
compare or
1X
11
buffered PWM
Configuration
Pin under port control;
initial output level high
Pin under port control;
initial output level low
Capture on rising edge only
Capture on falling edge only
Capture on rising or
falling edge
Toggle output on compare
Clear output on compare
Set output on compare
Toggle output on compare
Clear output on compare
Set output on compare
Technical Data
206
Timer Interface Module (TIM)
MC68HC908LJ12 — Rev. 2.1
Freescale Semiconductor