MC68HC705J2 Datasheet, PDF (74/82 Pages) Freescale Semiconductor, Inc – member of the low-cost

Freescale Semiconductor, Inc.
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11.7 Control Timing (V_DD = 3.3 Vdc)
Table 11-6. Control Timing (V_DD = 3.3 Vdc)
(V_DD = 3.3 Vdc 10%, V_SS = 0 Vdc; T_A = T_L to T_H)
Characteristic
Symbol
Min
Max Unit
Oscillator Frequency
Crystal Option
External Clock Option
f_osc
—
2.0 MHz
dc
2.0
Internal Operating Frequency
Crystal (f_osc ÷ 2)
External Clock (f_osc ÷ 2)
Cycle Time
RESET Pulse Width
Timer Resolution (NOTE 1)
Interrupt Pulse Width Low (Edge-Triggered)
Interrupt Pulse Period
OSC1 Pulse Width
f_op
—
1.0 MHz
dc
1.0
t_cyc
1000
—
ns
t_RL
1.5
—
t_cyc
t_RESL
4.0
—
t_cyc
t_ILIH
250
—
ns
t_ILIL
(NOTE 2) —
t_cyc
t_OH, t_OL
400
—
ns
NOTES:
1. The 2-bit timer prescaler is the limiting factor in determining timer resolution.
2. The minimum period t_ILIL should not be less than the number of cycle times it takes to execute
the interrupt service routine plus 19 t_cyc.
11-8
ELECTRICAL SPECIFICATIONS
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Rev. 2