MC68HC705J2 Datasheet, PDF (54/82 Pages) Freescale Semiconductor, Inc – member of the low-cost

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10.1.3 Direct
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Direct instructions can access any of the first 256 memory addresses with two
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bytes. The first byte is the opcode, and the second is the low byte of the operand
address. In direct addressing, the CPU automatically uses $00 as the high byte of
the operand address. BRSET and BRCLR are three-byte instructions that use
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direct addressing to access the operand and relative addressing to specify a
branch destination.
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10.1.4 Extended
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Extended instructions use only three bytes to access any address in memory. The
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first byte is the opcode; the second and third bytes are the high and low bytes of
the operand address.
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When using the Motorola assembler, the programmer does not need to specify
whether an instruction is direct or extended. The assembler automatically selects
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the shortest form of the instruction.
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10.1.5 Indexed, No Offset
Indexed instructions with no offset are one-byte instructions that can access data
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with variable addresses within the first 256 memory locations. The index register
contains the low byte of the conditional address of the operand. The CPU
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automatically uses $00 as the high byte, so these instructions can address
locations $0000–$00FF.
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Indexed, no offset instructions are often used to move a pointer through a table or
to hold the address of a frequently used RAM or I/O location.
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10.1.6 Indexed, 8-Bit Offset
Indexed, 8-bit offset instructions are two-byte instructions that can access data with
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variable addresses within the first 511 memory locations. The CPU adds the
unsigned byte in the index register to the unsigned byte following the opcode. The
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sum is the conditional address of the operand. These instructions can access
locations $0000–$01FE.
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Indexed 8-bit offset instructions are useful for selecting the kth element in an
n-element table. The table can begin anywhere within the first 256 memory
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locations and could extend as far as location 510 ($01FE). The k value is typically
in the index register, and the address of the beginning of the table is in the byte
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following the opcode.
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10-2
INSTRUCTION SET
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