MC68HC705J2 Datasheet, PDF (37/82 Pages) Freescale Semiconductor, Inc – member of the low-cost

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SECTION 6
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MEMORY
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This section describes the organization of the on-chip memory.
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6.1 Memory Map
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The CPU can address 4 Kbytes of memory space. The program counter normally
advances one address at a time through the memory, reading the program
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instructions and data. The EPROM portion of memory holds the program
instructions, fixed data, user-defined vectors, and service routines. The RAM portion
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of memory holds variable data. I/O registers are memory-mapped so that the CPU
can access their locations in the same way that it accesses all other memory
locations.
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Figure 6-1 is a memory map of the MCU. Figure 6-2 is a more detailed memory map
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of the 32-byte I/O register section.
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6.1.1 Input/Output Section
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The first 32 addresses of the memory space, $0000–$001F, are defined as the I/O
section. These are the addresses of the I/O control registers, I/O status registers,
and I/O data registers.
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6.1.2 RAM
The MCU has 112 bytes of fully static read/write memory for storage of variable and 14
temporary data during program execution. RAM addresses $00C0–$00FF serve as
the stack. The CPU uses the stack to save CPU register contents before processing ₁₅
an interrupt or subroutine call. The stack pointer decrements during pushes and
increments during pulls.
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NOTE
Be careful if using the stack addresses ($00C0–$00FF) for data
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storage or as a temporary work area. The CPU may overwrite data in
the stack during a subroutine or interrupt.
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MEMORY
Rev. 2
6-1
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