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MC68HC705J2 Datasheet, PDF (26/82 Pages) Freescale Semiconductor, Inc – member of the low-cost
Freescale Semiconductor, Inc.
4.1.5.4 Zero Flag
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The CPU sets the zero flag when an arithmetic operation, logical operation, or data
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manipulation produces a $00.
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4.1.5.5 Carry/Borrow Flag
The CPU sets the carry/borrow flag when an addition operation produces a carry
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out of bit 7 of the accumulator. Some logical operations and data manipulation
instructions also clear or set the carry/borrow flag.
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4.2 Arithmetic/Logic Unit (ALU)
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The ALU performs the arithmetic and logical operations defined by the instruction
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set.
The binary arithmetic circuits decode instructions and set up the ALU for the
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selected operation. Most binary arithmetic is based on the addition algorithm,
carrying out subtraction as negative addition. Multiplication is not performed as a
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discrete operation but as a chain of addition and shift operations within the ALU.
The multiply instruction (MUL) requires 11 internal processor cycles to complete
this chain of operations.
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4.3 Low-Power Modes
The following paragraphs describe the STOP and WAIT modes. (Refer also to 6.2
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Data Retention Mode.)
13 4.3.1 STOP Mode
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The STOP instruction puts the MCU in its lowest power-consumption mode. In
STOP mode, the following events occur:
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• The CPU clears TOF and RTIF, the timer interrupt flags in the timer control
and status register, removing any pending timer interrupts.
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• The CPU clears TOIE and RTIE, the timer interrupt enable bits in the timer
control and status register, disabling further timer interrupts.
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• The CPU clears the divide-by-four timer prescaler.
• The CPU clears the interrupt mask in the condition code register, enabling
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external interrupts.
• The internal oscillator stops, halting all internal processing, including
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operation of the timer and the COP timer.
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The STOP instruction does not affect any other registers or any I/O lines.
CENTRAL PROCESSOR UNIT
4-4
Rev. 2
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