MC68HC705J2 Datasheet, PDF (40/82 Pages) Freescale Semiconductor, Inc – member of the low-cost

Freescale Semiconductor, Inc.
6.1.3 EPROM
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Two Kbytes of user EPROM for storage of program instructions and fixed data are
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located at addresses $0700–$0EFF. The eight addresses from $0FF8–$0FFF are
EPROM locations reserved for interrupt vectors and reset vectors. Eight additional
EPROM bytes are located at $0FF0–$0FF8. There are two ways to write data to
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the EPROM:
• The EPROM programming register contains the control bits for programming
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the EPROM on a byte-by-byte basis.
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• The bootloader ROM contains routines to download the contents of an
external memory device to the on-chip EPROM.
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6.1.3.1 EPROM Programming
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The EPROM programming register, shown in Figure 6-3, contains the control bits
for programming the EPROM.
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PROG — EPROM Programming Register
$001C
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Bit 7
6
5
4
3
2
1
Bit 0
0
0
0
0
0
LATCH
0
EPGM
10
RESET
0
0
0
0
0
0
0
0
Figure 6-3. EPROM Programming Register (PROG)
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LATCH — EPROM Bus Latch
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This read/write bit causes address and data buses to be latched for EPROM
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programming. Clearing the LATCH bit automatically clears the EPGM bit.
1 = Address and data buses configured for EPROM programming
0 = Address and data buses configured for normal operation
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EPGM — EPROM Programming
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This read/write bit applies programming power to the EPROM. To write the
EPGM bit, the LATCH bit must already be set.
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1 = EPROM programming power switched on
0 = EPROM programming power switched off
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Bits 7–3 and 1 — Not used; always read as zeros.
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19
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MEMORY
6-4
Rev. 2
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