MC68HC705J2 Datasheet, PDF (33/82 Pages) Freescale Semiconductor, Inc – member of the low-cost

Freescale Semiconductor, Inc.
5.2 Interrupts
An interrupt temporarily stops normal processing to process a particular event.
Unlike a reset, an interrupt does not stop the operation of the instruction being
1
executed. An interrupt takes effect when the current instruction completes its
execution. An interrupt saves the CPU registers on the stack and loads the program
2
counter with a user-defined interrupt vector address. The following conditions
produce an interrupt:
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• Timer overflow or real-time interrupt request (timer interrupts)
• A logical zero applied to the IRQ pin (external interrupt)
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• SWI instruction (software interrupt)
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The CPU does the following things to begin servicing an interrupt:
• Stores the contents of the CPU registers on the stack as shown in Figure 5-2
6
7
TOWARD LOWER ADDRESSES
(LOWEST STACK ADDRESS IS $00C0)
STACK 7
0
CONDITION CODE REGISTER
ACCUMULATOR
INDEX REGISTER
8
9
10
11
PROGRAM COUNTER HIGH
PROGRAM COUNTER LOW
UNSTACK
TOWARD HIGHER ADDRESSES
(HIGHEST STACK ADDRESS IS $00FF)
Figure 5-2. Interrupt Stacking Order
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13
14
15
• Sets the interrupt mask to prevent further interrupts
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• Loads the program counter with the contents of the appropriate interrupt vector
locations:
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– $0FF8 and $0FF9 (timer interrupt vector)
– $0FFA and $0FFB (external interrupt vector)
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– $0FFC and $0FFD (software interrupt vector)
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20
RESETS AND INTERRUPTS
Rev. 2
5-3
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