BCM4354KKWBGT Datasheet, PDF (46/192 Pages) Cypress Semiconductor – Single-Chip 5G Wi-Fi IEEE 802.11ac 2×2 MAC/ Baseband/Radio with Integrated Bluetooth 4.1 and FM Receiver

BCM4354 Data Sheet
PCM Interface
PCM Interface
The BCM4354 supports two independent PCM interfaces that share the pins with the I²S interfaces. The PCM
Interface on the BCM4354 can connect to linear PCM Codec devices in master or slave mode. In master mode,
the BCM4354 generates the PCM_CLK and PCM_SYNC signals, and in slave mode, these signals are provided
by another master on the PCM interface and are inputs to the BCM4354.
The configuration of the PCM interface may be adjusted by the host through the use of vendor-specific HCI
commands.
Slot Mapping
The BCM4354 supports up to three simultaneous full-duplex SCO or eSCO channels through the PCM
interface. These three channels are time-multiplexed onto the single PCM interface by using a time-slotting
scheme where the 8 kHz or 16 kHz audio sample interval is divided into as many as 16 slots. The number of
slots is dependent on the selected interface rate of 128 kHz, 512 kHz, or 1024 kHz. The corresponding number
of slots for these interface rate is 1, 2, 4, 8, and 16, respectively. Transmit and receive PCM data from an SCO
channel is always mapped to the same slot. The PCM data output driver tristates its output on unused slots to
allow other devices to share the same PCM interface signals. The data output driver tristates its output after the
falling edge of the PCM clock during the last bit of the slot.
Frame Synchronization
The BCM4354 supports both short- and long-frame synchronization in both master and slave modes. In short-
frame synchronization mode, the frame synchronization signal is an active-high pulse at the audio frame rate
that is a single-bit period in width and is synchronized to the rising edge of the bit clock. The PCM slave looks
for a high on the falling edge of the bit clock and expects the first bit of the first slot to start at the next rising edge
of the clock. In long-frame synchronization mode, the frame synchronization signal is again an active-high pulse
at the audio frame rate; however, the duration is three bit periods and the pulse starts coincident with the first
bit of the first slot.
Data Formatting
The BCM4354 may be configured to generate and accept several different data formats. For conventional
narrowband speech mode, the BCM4354 uses 13 of the 16 bits in each PCM frame. The location and order of
these 13 bits can be configured to support various data formats on the PCM interface. The remaining three bits
are ignored on the input and may be filled with 0s, 1s, a sign bit, or a programmed value on the output. The
default format is 13-bit 2’s complement data, left justified, and clocked MSB first.
Broadcom^®
October 15, 2014 • 4354-DS109-R
BROADCOM CONFIDENTIAL
Page 45